ISL6529 Datasheet, PDF (8/19 Pages) Intersil Corporation – Dual Regulator.Synchronous Rectified Buck PWM and Linear Power Controller

CAPACITOR CURRENT
ISL6529, ISL6529A
1.5V OUTPUT
Had the cause of the UV still been present after the delay
interval, the UV protection circuitry becomes active
approximately 875ms into the soft-start interval. A fault
signal could then be generated and the outputs once again
shut down. The resulting hiccup mode style of protection
would continue to repeat indefinitely.
Output Voltage Selection
The output voltage of the PWM converter can be programmed
to any level between V_IN (i.e. +3.3V) and the internal
reference, 0.8V . An external resistor divider is used to scale
the output voltage relative to the reference voltage and feed it
back to the inverting input of the error amplifier (see Figure 4).
V_OUT2 (2.5V)
CAPACITOR CURRENT
1.5V OUTPUT
FIGURE 2. TOP SCOPE TRACES ARE VOLTAGE RAMP AND
CAPACITOR CURRENT. LOWER TRACES ARE
TIME AND VOLTAGE EXPANSION OF UPPER
SCOPE TRACES.
Undervoltage Protection
The FB and FB2 pins are monitored during converter
operation by two separate undervoltage (UV) comparators. If
the FB voltage drops below 51.5% of the reference voltage
(0.41V), a fault signal is generated. The internal fault logic
shuts down both regulators simultaneously when the fault
signal triggers a restart.
Figure 3 illustrates the protection feature responding to a UV
event on V_OUT1. At time t0, VOUT1 has dropped below
51.5% of the nominal output voltage. Both outputs are quickly
shut down and the internal soft-start function begins
producing soft-start ramps. The delay interval, t0 to t3, seen
by the output is equivalent to three soft-start cycles. After a
short delay interval of 10.5ms, the fourth internal soft-start
cycle initiates a normal soft-start ramp of the output, at time t3.
Both outputs are brought back into regulation by time t4, as
long as the UV event has cleared.
V_OUT1 (1.5V)
0V
(0.5V/DIV)
DELAY INTERVAL
V_OUT2 (2.5V)
INTERNAL SOFT-START FUNCTION
DELAY INTERVAL
0V
t0
t1
t2
t3
t4
TIME
FIGURE 3. UNDERVOLTAGE PROTECTION RESPONSE
8
FN9070.5
April 12, 2005