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ISL55112 Datasheet, PDF (8/20 Pages) Intersil Corporation – High-Speed Dual Precision CCD Driver
ISL55112
Electrical Specifications
Test Conditions: XX_VP = 4V, XX_VN = -4V, VDD = 3.3V, VPLUS = 4V, VSUB = -4V,
ROIC = 68kΩ; Unless Otherwise specified. Full (-40°C to +85°C) limits are established by
characterization and are not production tested. Boldface limits apply over the operating
temperature range, -40°C to +85°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
(Note 8)
TEMP
MIN
(°C) (Note 6)
TYP
MAX
(Note 6) UNITS
Active Supply Current: EN=1, PD=0
IACT Current on each pin type; 40 H1_VP,
+4.0V
25
MHz input: Note 15
H2_VP
118
mA
H1_VN,
-4.0V
25
H2_VN
-118
mA
RG_VP,
+4.0V
25
HL_VP
15
mA
RG_VN,
-4.0V
25
HL_VN
-15
mA
VDD
3.3V, All driver
25
inputs running
3.8
mA
VPLUS
+4.0V
25
0.9
mA
VSUB
-4.0V
25
-0.9
mA
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Full Temperature limits
established by characterization and are not production tested.
7. The algebraic convention, where by the most negative value is the minimum and the most positive a maximum, is used in the
data sheet.
8. All load capacitances are with respect to Gnd.
9. PD (Power-Down) is a static control. Do not allow toggle frequency above 1 Hz. PD should be used in combination with EN pin
during Active and Inactive state changes. (See Power Mode Sequencing).
10. H1, H2, EN, RG, HL VIH and VIL Thresholds established while toggling @10MHz.
11. PD VIH and VIL Thresholds established while toggling @ 1Hz.
12. ATE test conditions limit rON measurement capability. Refer to Characterization tables for typical rON Values. The Output
Impedance Control active circuitry adjusts rON characteristics dynamically.
13. Peak current as measured with evaluation board with 1Ω resistor in series with 0.022µF capacitor. Measurements as
characterized with ISL55112 Evaluation board.
14. Dynamic FULL/MIN/MAX data recorded with ISL55112 Evaluation board. Series inductance of decoupling, loads and
interconnect will greatly influence this measurement. See section on “Power Supply Bypassing and Printed Circuit Board
Layout” on page 11.
15. As measured using evaluation board with H1_OUT, H2_OUT = 300pF load on each output and RG_OUT, HL_OUT = 22pF load
on each output.
Test Circuits and Waveforms
VDD
EN
IN
CL
OUT
SIGNAL
GENERATOR
IN
OUT
OUT
50%
tPD+
50%
90%
10%
tR
50%
tPD-
50%
3V
0V
VP
VN
90%
VP
10%
VN
tF
FIGURE 1A. TEST CIRCUIT
FIGURE 1B. MEASUREMENT POINTS
FIGURE 1. DRIVER PROPAGATION DELAY AND RISE AND FALL TIMES
8
FN6649.0
September 23, 2009