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ISL29125_14 Datasheet, PDF (8/17 Pages) Intersil Corporation – Digital Red, Green and Blue Color Light Sensor with IR Blocking Filter
ISL29125
SCL FROM
MASTER
SDA FROM
TRANSMITTER
SDA FROM
RECEIVER
8th
CLk
9th CLk
HIGH IMPEDANCE
START
DATA
STABLE
DATA
CHANGE
DATA
STABLE
ACK
FIGURE 9. START, DATA STABLE, ACKNOWLEDGE AND STOP CONDITION
STOP
S
S
T
T
S
SIGNAL FROM
MASTER DEVICE
A DEVICE ADDRESS
R
WRITE
ADDRESS BYTE
A DEVICE ADDRESS
R
READ
DATA BYTE
T
O
T
T
P
SIGNAL AT SDA
10001000
10001001
SIGNALS FROM
SLAVE DEVICE
A
A
A
C
C
C
K
K
K
FIGURE 10. BYTE ADDRESS READ SEQUENCE
Read Operation
ISL29125 has two basic read operations: Byte Read and Burst
Read.
BYTE READ
Byte read operations allows the master to access any register
location in the ISL29125. The Byte read operation is a two step
process. The master issues the START condition and the Device
Address byte with the R/W bit set to “0”, receives an
acknowledge, then issues the Register Address byte. After
acknowledging receipt of the register address byte, the master
immediately issues another START condition and the Device
Address byte with the R/W bit set to “1”. This is followed by an
acknowledge from the device and then by the 8-bit data word.
The master terminates the read operation by not responding with
an acknowledge and then issuing a stop condition. Refer to
Figure 10.
BURST READ
Burst read operation is identical to the Byte Read operation.
After the first Data byte is transmitted, the master now responds
with an acknowledge, indicating it requires additional data. The
device continues to output data for each acknowledge received.
The master terminates the read operation by not responding with
an acknowledge but issuing a STOP condition (refer to Figure 11).
For more information about the I2C standard, please consult the
Phillips™ I2C specification documents.
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
S
T
A DEVICE ADDRESS
R
W R ITE
T
ADDRESS BYTE
S
T
A DEVICE ADDRESS
R
READ
T
DATA BYTE 1
DATA BYTE 2
S
DATA BYTE n
T
O
P
10001000
10001001
A
A
C
C
K
K
A
A
A
C
C
C
(“n” is any integer
K
K
K
greater than 1)
FIGURE 11. BURST READ SEQUENCE
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8
FN8424.2
January 24, 2014