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82C284883 Datasheet, PDF (7/9 Pages) Intersil Corporation – Clock Generator and Ready Interface for 80C286 Processors
Timing Waveforms (Continued)
82C284/883
CLK
PCLK
F/C
X1
φ1
φ2
φ1
t7
t8
φ2
φ1
φ2
t27
CLK
PCLK
φ1
φ2
φ1
F/C t7
t8
EFI
φ2
φ1
φ2
t15B
FIGURE 5. CLK AS A FUNCTION OF F/C, PCLK, X1, AND EFI DURING DYNAMIC FREQUENCY SWITCHING
NOTE: This is an asynchronous input. The setup and hold times shown are required to guarantee the response shown.
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