82C284883 Datasheet, PDF (5/9 Pages) Intersil Corporation – Clock Generator and Ready Interface for 80C286 Processors

82C284/883
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
SUBGROUPS
PDA
100%
1
Final Test
100%
2, 3, 8A, 8B, 10, 11
Group A
-
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Groups C & D
Samples/5005
1, 7, 9
A.C. Test Conditions
DEVICE
OUTPUT
VCC
RL
CL
TEST CONDITION
1
2
3
RL
750Ω
620Ω
∞
CL
75pF
150pF
75pF
A.C. Specifications
3.2V
EFI INPUT
CLK
OUTPUT
F/C
INPUT
RES
INPUT
0.8V
3.8V
0.4V
t_DELAY (MAX)
t_SETUP
3.6V
1.0V
3.2V 3.2V
0.8V 0.8V
VCC - 0.4V
3.6V
1.0V _0.4V
t_HOLD
3.8V
0.4V
VCC - 0.8V
0.8V 0.8V
VCC - 0.4V
0.4V
OTHER
DEVICE
INPUT
DEVICE
OUTPUT
2.0V 2.0V
0.8V 0.8V
t_DELAY (MAX)
t_DELAY (MIN)
2.0V
0.8V
2.6V
0.4V
FIGURE 1. A.C. DRIVE, SETUP, HOLD AND DELAY TIME MEASUREMENT POINTS
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