ISL6535 Datasheet, PDF (6/14 Pages) Intersil Corporation – Synchronous Buck Pulse-Width Modulator PWM Controller

ISL6535
Functional Pin Description (SOIC/QFN)
RT (Pin 1/14)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R_RT) from this pin to GND, the
switching frequency is set from between 200kHz and
1.5MHz according Equation 1: .
R_RT[kΩ]
≈
----------------------⁶---⁵---⁰----⁰-----------------------
F_s[kHz] – 200[kHz]
–
1.3 k Ω
(R_RT to GND)
(EQ. 1)
Alternately ISL6535’s switching frequency can be lowered
from 200kHz to 50kHz by connecting the RT pin with a
resistor to VCC according to Equation 2:
R_R
T
[k
Ω
]
≈
--------------------⁵---⁵----⁰---⁰---⁰----------------------
200[kHz] – F_s[kHz]
+
70 k
Ω
(R_RT to VCC)
(EQ. 2)
OCSET (Pin 2/15)
The current limit is programmed by connecting this pin with a
resistor and capacitor to the drain of the high side MOSEFT.
A 200mA current source develops a voltage across the
resistor, which is then compared with the voltage developed
across the high side MOSFET. A blanking period of 120ns is
provided for noise immunity.
SS (Pin 3/1)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 30µA current source, sets the soft-start
interval of the converter.
COMP (Pin 4/2) and FB (Pin 5/3)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
EN (Pin 6/4)
This pin is a TTL compatible input. Pull this pin below 0.8V to
disable the converter. In shutdown the soft-start pin is
discharged and the UGATE and LGATE pins are held low.
GND (Pin 7/6)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PHASE (Pin 8/7)
This pin connects to the source of the high side MOSFET
and the drain of the low side MOSFET. This pin represents
the return path for the high side gate driver. During normal
switching, this pin is used for high side current sensing.
UGATE (Pin 9/8)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
BOOT (Pin 10/9)
This pin provides bias to the upper MOSFET driver. A
bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND (Pin 11/10)
This is the power ground connection. Tie the lower MOSFET
source and board ground to this pin.
LGATE (Pin 12/11)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
PVCC (Pin 13/12)
Provide a 12V ±10% bias supply for the lower gate drive to
this pin. This pin should be bypassed with a capacitor to
PGND.
VCC (Pin 14/13)
Provide a 12V bias supply for the chip to this pin. The pin
should be bypassed with a capacitor to GND.
REFIN (QFN ONLY Pin 5)
Upon enable if REFIN is less than 2.2V, the external
reference pin is used as the control reference instead of the
internal 0.597V reference. An internal 6µA pull-up to 5V is
provided for disabling this functionality.
SSDONE (QFN ONLY Pin 16)
Provides an open drain signal at the end of soft-start.
Functional Description
Initialization
The ISL6535 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the bias voltage at the VCC pin and the driver input on the
PVCC pin. When the voltages at VCC and PVCC exceed
their rising POR thresholds, a 30µA current source driving
the SS pin is enabled. Upon the SS pin exceeding 1V, the
ISL6535 begins ramping the non-inverting input of the error
amplifier from GND to the System Reference. During
initialization the MOSFET drivers, pull UGATE to PHASE
and LGATE to PGND.
Soft-start
During soft-start, an internal 30µA current source charges the
external capacitor (C_SS) on the SS pin up to ~4V. If the
ISL6535 is utilizing the internal reference, then as the SS pin’s
voltage ramps from 1V to 3V, the soft-start function scales the
reference input (positive terminal of error amp) from GND to
VREF (0.597V nominal). If the ISL6535 is utilizing an
externally supplied reference, when the voltage on the SS pin
reaches 1V, the internal reference input (into of the error amp)
ramps from GND to the externally supplied reference at the
same rate as the voltage on the SS pin. Figure 3 shows a
typical soft-start interval. The rise time of the output voltage is,
6
FN9255.1
May 5, 2008