ISL6535 Datasheet, PDF (12/14 Pages) Intersil Corporation – Synchronous Buck Pulse-Width Modulator PWM Controller

ISL6535
temperature by calculating the temperature rise according to
package thermal-resistance specifications. A separate
heatsink may be necessary depending upon MOSFET
power, package type, ambient temperature and air flow.
Standard-gate MOSFETs are normally recommended for
use with the ISL6535. However, logic-level gate MOSFETs
can be used under special circumstances. The input voltage,
upper gate drive level, and the MOSFETs absolute gate-to-
source voltage rating determine whether logic-level
MOSFETs are appropriate.
Figure 9 shows the upper gate drive (BOOT pin) supplied by
a bootstrap circuit from +12V. The boot capacitor, C_BOOT
develops a floating supply voltage referenced to the PHASE
pin. This supply is refreshed each cycle to a voltage of +12V
less the boot diode drop (V_D) when the lower MOSFET, Q₂
turns on. A MOSFET can only be used for Q₁ if the
MOSFETs absolute gate-to-source voltage rating exceeds
the maximum voltage applied to +12V. For Q₂, a logic-level
MOSFET can be used if its absolute gate-to-source voltage
rating also exceeds the maximum voltage applied to +12V.
+12V
D_BOOT
+-
V_D
+1.2V TO +12V
ISL6535
BOOT
UGATE
C_BOOT
Q1
PHASE
NOTE:
V_G-S ≈ V_CC - V_D
PVCC ^+12V
-
+
LGATE
PGND
Q2
D2
NOTE:
V_G-S ≈ PVCC
GND
FIGURE 9. UPPER GATE DRIVE - BOOTSTRAP OPTION
Figure 10 shows the upper gate drive supplied by a direct
connection to +12V. This option should only be used in
converter systems where the main input voltage is +5 VDC
or less. The peak upper gate-to-source voltage is
approximately +12V less the input supply. For +5V main
power and +12V DC for the bias, the gate-to-source voltage
of Q₁ is 7V. A logic-level MOSFET is a good choice for Q₁
and a logic-level MOSFET can be used for Q₂ if its absolute
gate-to-source voltage rating exceeds the maximum voltage
applied to PVCC. This method reduces the number of
required external components, but does not provide for
immunity to phase node ringing during turn on and may
result in lower system efficiency.
+12V
+5V OR LESS
ISL6535
BOOT
UGATE
Q1
NOTE:
V_G-S ≈ V_CC - 5V
+12V
PVCC
Q2
D2
-
LGATE
+
NOTE:
PGND
V_G-S ≈ PVCC
GND
FIGURE 10. UPPER GATE DRIVE - DIRECT V_CC DRIVE OPTION
Schottky Selection
Rectifier D₂ is a clamp that catches the negative inductor
swing during the dead time between turning off the lower
MOSFET and turning on the upper MOSFET. The diode must
be a Schottky type to prevent the lossy parasitic MOSFET
body diode from conducting. It is acceptable to omit the
diode and let the body diode of the lower MOSFET clamp
the negative inductor swing, but efficiency could slightly
decrease as a result. The diode's rated reverse breakdown
voltage must be greater than the maximum input voltage.
12
FN9255.1
May 5, 2008