X9251_07 Datasheet, PDF (5/20 Pages) Intersil Corporation – Quad Digitally-Controlled (XDCP™) Potentiometer

X9251
One of Four Potentiometers
#: 0, 1, 2, or 3
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
DR#0
8
DR#2
R_H
SERIAL
BUS
INPUT
DR#1
8
PARALLEL
BUS
DR#3
INPUT
WIPER
COUNTER
---
DCP
CORE
R_W
DECODE
COUNTER
REGISTER
(WCR#)
IF WCR = 00[H] then R_W is closet to R_L
IF WCR = FF[H] then R_W is closet to R_H
UP/DN
INC/DEC
LOGIC
UP/DN
MODIFIED SCK
CLK
R_L
FIGURE 1. DETAILED POTENTIOMETER BLOCK DIAGRAM
Power Up and Down Recommendations
There are no restrictions on the power-up or power-down
conditions of V_CC and the voltages applied to the
potentiometer pins provided that V_CC is always more
positive than or equal to V_H, V_L, and V_W (i.e., V_CC ≥ V_H, V_L,
V_W). The V_CC ramp rate specification is always in effect.
Wiper Counter Register (WCR)
The X9251 contains four Wiper Counter Registers, one for
each potentiometer. The Wiper Counter Register can be
envisioned as a 8-bit parallel and serial load counter with its
outputs decoded to select one of 256 wiper positions along
its resistor array. The contents of the WCR can be altered in
four ways: it may be written directly by the host via the Write
Wiper Counter Register instruction (serial load); it may be
written indirectly by transferring the contents of one of four
associated data registers via the XFR Data Register
instruction (parallel load); it can be modified one step at a
time by the Increment/Decrement instruction (See
Instruction section for more details). Finally, it is loaded with
the contents of its Data Register zero (DR#0) upon
power-up. (See Figure 1)
The wiper counter register is a volatile register; that is, its
contents are lost when the X9251 is powered-down.
Although the register is automatically loaded with the value
in DR#0 upon power-up, this may be different from the value
present at power-down. Power-up guidelines are
recommended to ensure proper loadings of the DR#0 value
into the WCR#.
Data Registers (DR)
Each of the four DCPs has four 8-bit non-volatile Data
Registers. These can be read or written directly by the host.
Data can also be transferred between any of the four Data
Registers and the associated Wiper Counter Register. All
operations changing data in one of the Data Registers is a
non-volatile operation and takes a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can be
used as regular memory locations for system parameters or
user preference data.
Bits [7:0] are used to store one of the 256 wiper positions or
data (0 ~ 255).
Status Register (SR)
This 1-bit Status Register is used to store the system status.
WIP: Write In Progress status bit, read only.
• When WIP = 1, indicates that high-voltage write cycle is in
progress.
• When WIP = 0, indicates that no high-voltage write cycle is
in progress.
5
FN8166.5
April 13, 2007