ISL6567_07 Datasheet, PDF (5/26 Pages) Intersil Corporation – Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers

ISL6567
Absolute Maximum Ratings
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Shunt Regulator Voltage, V_VREG . . . . . . . . . . . . . . . -0.3V to +6.5V
Boot Voltage, V_BOOT . . . . . . . . . . . . . PGND - 0.3V to PGND + 27V
Phase Voltage, V_PHASE . . . . . . . . . . V_BOOT - 7V to V_BOOT + 0.3V
Upper Gate Voltage, V_UGATE . . . . V_PHASE - 0.3V to V_BOOT + 0.3V
Lower Gate Voltage, V_LGATE. . . . . . . . PGND - 0.3V to VCC + 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . HBM Class 1 JEDEC STD
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . +4.9V to +5.5V
Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Thermal Information
Thermal Resistance
θ_JA (°C/W) θ_JC (°C/W)
QFN Package (Notes 1, 2). . . . . . . . . .
43
7
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θ_JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Operating Conditions: V_CC = 5V, T_J = -40°C to +85°C, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN
TYP
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Rising VCC POR (Power-On Reset) Threshold
I_VCC; EN > 0.7V; LGATE, UGATE open
-
7.6
4.30
4.40
VCC POR Hysteresis
0.46
0.51
Rising PVCC POR Threshold
3.60
3.67
Shunt Regulation
Maximum Shunt Current
Switching Frequency (per channel; Note 4)
Frequency Tolerance
Oscillator Peak-to-Peak Ramp Amplitude
Maximum Duty Cycle
CONTROL THRESHOLDS
V_VCC; I_VREG = 0 to 120mA
I_{VREG_MAX}
F_SW
F_SW
V_OSC
d_MAX
4.90
5.10
120
-
200
-
-10
-
-
1.4
-
66
EN Threshold
-
0.65
EN Hysteresis Current
-
20
MON Power-Good Enable Threshold
MON Hysteresis Current
V_{MON_TH}
290
305
-
10
SOFT-START
SS Current
I_SS
SS Ramp Amplitude
-
22
0.55
-
SS Threshold for Output Gates Turn-Off
0.40
-
REFERENCE AND DAC
System Accuracy (Commercial Temp. Range)
-0.6
-
System Accuracy (Industrial Temp. Range)
-0.8
-
Internal Reference
External Reference DC Amplitude Range
External Reference DC Offset Range
V_REF
V_REFTRK (DC)
V_REFTRK (DC) offset
-
0.6
0.1
-
-4.5
-
MAX UNITS
9
mA
4.50
V
0.58
V
3.75
V
5.35
V
-
mA
2000 kHz
10
%
-
V
-
%
-
V
-
μA
320 mV
-
μA
-
μA
3.60
V
-
V
0.6
%
0.8
%
-
V
2.3
V
4.5
mV
5
FN9243.2
March 20, 2007