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ISL6567_07 Datasheet, PDF (15/26 Pages) Intersil Corporation – Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers
VTARGET
VOUT
ISL6567
VTARGET
VOFS
VOUT
REFTRK
+
To VTARGET RS
RP
ISL6567
VREF
EXT CIRCUIT
+
E/A
-
FB
R1
VDIFF
-V----R----E----F--
VOUT
=
--------R----P---------
RP + RS
+
X1
-
VSEN
RGND
RP
RS
-
+
To VOUT
FIGURE 13. COINCIDENTAL VOLTAGE TRACKING
Simple ratiometric external voltage tracking, such as that
required by the termination voltage regulator for double data
rate (DDR) memory can be implemented by feeding a
reference voltage equal to 0.5 of the memory core voltage
(VDDQ) to the reference input of the ISL6567, as shown in
Figure 12. The resistor divider at the REFTRK pin sets the
VOUT level. Select a suitable SS capacitor, such that the SS
clamp does not interfere with the desired ramp-up time or
slope of VOUT.
Coincidental tracking using the internal reference results in a
behavior similar to that presented in Figure 13. The resistor
divider at the input of the differential amplifier sets the output
voltage, VOUT, to the desired regulation level. The same
resistor divider used at the REFTRK pin divides down the
voltage to be tracked, effectively scaling it to the magnitude
of the internal reference. As a result, the output voltage
ramps up at the same rate as the target voltage, its ramp-up
leveling off at the programmed regulation level established
by the RS/RP resistor divider.
VOFS REFTRK
+
To VTARGET RS
RP
VOFS
+-
+
-
+-
-V----R----E----F--
VOUT
=
--------R----P---------
RP + RS
ISL6567
VREF
EXT CIRCUIT
+
E/A
-
FB
R1
VDIFF
+
X1
-
VSEN
RGND
RP
RS
-
+
To VOUT
FIGURE 14. OFFSET VOLTAGE TRACKING
Offset tracking can be accomplished via a circuit similar to
that used for coincidental tracking (see Figure 14). The
desired offset can be implemented via a voltage source
inserted in line with the resistor divider present at the
REFTRK pin. Since most offset tracking requirements are
subject to fairly broad tolerances, simple voltage drop
sources can be used. Figure 14 exemplifies the use of
various counts of forward-biased diodes or that of a schottky,
although other options are available.
Sequential start-up control is easily implemented via the EN
pin, using either a logic control signal or the ISL6567’s own
EN threshold as a power-good detector for the tracked, or
sequence-triggering, voltage. See Figure 15 for details of
control using the EN pin.
OVERVOLTAGE PROTECTION
Although the normal feedback loop operation naturally
counters overvoltage (OV) events the ISL6567 benefits from
a secondary, fixed threshold overvoltage protection. Should
the output voltage exceed 120% of the reference, the lower
MOSFETs are turned on. Once turned on, the lower
MOSFETs are only turned off when the sensed output
voltage drops below the 110% falling threshold of the OC
comparator. The OVP behavior repeats for as long as the
ISL6567 is biased, should the sensed output voltage rise
back above the designated threshold. The occurrence of an
OVP event does not latch the controller; should the
15
FN9243.2
March 20, 2007