X9261 Datasheet, PDF (4/21 Pages) Intersil Corporation – Single Supply/Low Power/256-Tap/SPI Bus

X9261
PIN CONFIGURATION
SO
A0
NC
NC
NC
NC
V_CC
R_L0
R_H0
R_W0
CS
WP
SOIC/TSSOP
1
24
2
23
3
22
4
21
5
20
6
19
X9261
7
18
8
17
9
16
10
15
11
14
12
13
HOLD
SCK
NC
NC
NC
NC
V_SS
R_W1
R_H1
R_L1
A1
SI
PIN ASSIGNMENTS
Pin
(SOIC/
TSSOP) Symbol
Function
1
SO Serial Data Output for SPI bus
2
A0 Device Address for SPI bus.
3
NC No Connect.
4
NC No Connect.
5
NC No Connect.
6
NC No Connect.
7
V_CC System Supply Voltage
8
R_L0 Low Terminal for Potentiometer 0.
9
R_H0 High Terminal for Potentiometer 0.
10
R_W0 Wiper Terminal for Potentiometer 0.
11
CS Device Address for SPI bus.
12
WP Hardware Write Protect
13
SI Serial Data Input for SPI bus
14
A1 Device Address for SPI bus.
15
R_L1 Low Terminal for Potentiometer 1.
16
R_H1 High Terminal for Potentiometer 1.
17
R_W1 Wiper Terminal for Potentiometer 1.
18
V_SS System Ground
19
NC No Connect
20
NC No Connect
21
NC No Connect
22
NC No Connect
23
SCK Serial Clock for SPI bus
24
HOLD Device select. Pause the SPI serial bus.
PIN DESCRIPTIONS
Bus Interface Pins
SERIAL OUTPUT (SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
SERIAL INPUT
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the
X9261.
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
DEVICE ADDRESS (A1 - A0)
The address inputs are used to set the 4-bit slave
address. A match in the slave address serial data
stream must be made with the address input in order
to initiate communication with the X9261.
CHIP SELECT (CS)
When CS is HIGH, the X9261 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9261, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
4
FN8171.2
September 14, 2005