X9261 Datasheet, PDF (16/21 Pages) Intersil Corporation – Single Supply/Low Power/256-Tap/SPI Bus

X9261
HIGH-VOLTAGE WRITE CYCLE TIMING
Symbol
t_WR
Parameter
High-voltage write cycle time (store instructions)
XDCP TIMING
Symbol
t_WRPO
t_WRL
Parameter
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
SYMBOL TABLE
Typ.
5
Max.
10
Units
ms
Min.
5
5
Max. Units
10 µs
10 µs
WAVEFORM INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
TIMING DIAGRAMS
Input Timing
CS
SCK
SI
t_LEAD
t_SU
t_H
t_WL
MSB
t_CYC
...
t_WH
t_FI
...
t_CS
t_RI
LSB
t_LAG
SO
High Impedance
16
FN8171.2
September 14, 2005