HC-5509B_03 Datasheet, PDF (4/9 Pages) Intersil Corporation – ITU CO/Loop Carrier SLIC

HC-5509B
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T_A = 25^oC, Min-Max Parameters are Over Operating
Temperature Range, V_B- = -48V, V_B+ = 5V, AG = DG = BG = 0V. All AC Parameters are specified at 600Ω
2-Wire Terminating Impedance (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
Logic Outputs
Logic ‘0’ V_OL
Logic ‘1’ V_OH
Power Dissipation On Hook
I_B+
I_B-
UNCOMMITTED OP AMP PARAMETERS
I_LOAD = 800µA
I_LOAD = 40µA
Relay Drivers Off
V_B+ = 5.25V, V_B- = -58V, R_LOOP = ∞
V_B+ = 5.25V, V_B- = -58V, R_LOOP = ∞
-
0.1
0.5
V
2.7
-
-
V
-
200
-
mW
-
-
6
mA
-6
-
-
mA
Input Offset Voltage
-
±5
-
mV
Input Offset Current
-
±10
-
nA
Differential Input Resistance
(Note 4)
-
1
-
MΩ
Output Voltage Swing
Small Signal GBW
R_L = 10kΩ
(Note 4)
-
±3
-
V_P-P
-
1
-
MHz
NOTE:
4. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial
design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification
compliance.
Pin Descriptions
SOIC
1
2
3
4
5
6
7
SYMBOL
DESCRIPTION
AG
Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive input
(Note 5) terminals.
V_B+ Positive Voltage Source - most positive supply.
C₁
Capacitor #C₁ - An external capacitor to be connected between this terminal and analog ground. Required for proper
operation of the loop current limiting function.
F1
Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally select logic
functions. The three selectable functions are mutually exclusive. See Truth Table. F1 should be toggled high after power
is applied.
F0
Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally select logic
functions. The three selectable functions are mutually exclusive. See Truth Table.
RS
Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse (50µs -
500µs) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected
systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive
going zero crossing. This ensures that the ring delay activates and deactivates when the instantaneous ring voltage is
near zero. If synchronization is not required, the pin should be tied to 5.
SHD Switch Hook Detection - An active low LS, TTL-compatible logic output. A line supervisory output.
8
GKD Ground Key Detection - An active low LS, TTL-compatible logic output. A line supervisory output.
9
TST A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper F1, F0
state is set and will keep ALM low. See Truth Table.
10
ALM An LS TTL-compatible active low output which responds to the thermal detector circuit when a safe operating die
temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low until the
proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to power down the part
when a thermal fault is detected and then reset with F0, F1. See Truth Table. It is possible to ignore transient thermal
overload conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be exercised in
attempting this as continued thermal overstress may reduced component life.
11
I_LMT Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage divider.
12
OUT1 The analog output of the spare operational amplifier.
13
-IN1 The inverting analog input of the spare operational amplifier.
4