D2-24044 Datasheet, PDF (4/20 Pages) Intersil Corporation – Digital Audio Amplifier Power Stage

D2-24044
Absolute Maximum Ratings
Supply Voltage
HVDD[A:D], VDDHV. . . . . . . . . . . . . . . . . . 0V to +28.0V
PWMVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 4.0V
Input Voltage
Any Input . . . . . . . . . . . . . . . . . -0.3V to PWMVDD + 0.3V
Thermal Information
Thermal Resistance (Typical)
θ_JA (°C/W) θ_JC (°C/W)
38 Ld HTSSOP Package (Notes 4, 5) 29
1.3
Maximum Storage Temperature . . . . . . . . -55°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . .-10°C to +85°C
High Voltage Supply Voltage,
HVDD[A:D], VDDHV . . . . . . . . . . . . . . . . . . 9.0V to 26.5V
Digital I/O Supply Voltage, PWMVDD . . . . . . . . . . . . . . 3.3V
Minimum Load Impedance (HVDD[A:D] ≤24.0V), Z_L . . . . 4Ω
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For θ_JC, the “case temp” location is the center of the exposed metal pad on the package underside.
6. Absolute Maximum parameters are not tested in production.
Electrical Specifications T_A = +25°C, PWMVDD = 3.3V ±10%. All grounds at 0.0V.
All voltages referenced to ground.
PARAMETER
TEST
CONDITIONS
SYMBOL
MIN
TYP MAX UNIT
Digital Input High Logic Level
Digital Input Low Logic Level
High Level Output Drive Voltage
(I_OUT at -Pin Drive Strength Current)
Low Level Output Drive Voltage
(I_OUT at +Pin Drive Strength Current)
Input Leakage Current
V_IH
2
--
V
V_IL
-
- 0.4 V
V_OH PWMVDD-0.4 - -
V
V_OL
-
- 0.4 V
Pins 1, 2, 3
I_IN
PWM Input Pins
(includes 100kΩ internal pull-down
resistor current)
-
- ±10 μA
-
- ±50 μA
Input Capacitance
Output Capacitance
All Outputs Except OUT[A:D]
OUT[A:D]
C_IN
C_OUT
-
9 - pF
-
9 - pF
-
190 -
Internal Pull-Up Resistance to PWMVDD
(for nERRORA-D, nOVRT)
-
100 - kΩ
Digital I/O Supply Pin Voltage, Current
PWMVDD
3
3.3 3.6 V
Active Current
-
0.47 - mA
Power-Down Current
-
0.15 - mA
3.3V (PWMVDD) BROWN-OUT DETECTION
Logic Supply Undervoltage Threshold
-
2.6 -
V
Logic Supply Undervoltage Threshold Hysteresis
-
200 - mV
Logic Supply Undervoltage Glitch Rejection
-
50 - ns
GATE DRIVE INTERNAL +5V BROWN-OUT DETECTION
Gate Drive Supply Undervoltage Threshold
-
4.5 -
V
4
FN7678.0
September 3, 2010