D2-24044 Datasheet, PDF (15/20 Pages) Intersil Corporation – Digital Audio Amplifier Power Stage

D2-24044
PWMIN1-HI-1
PWMIN1-LO-1
Channel 1
PWM Input _PWMIN1-HI-2
PWMIN1-LO-2
PWMIN2-HI-1
Channel 2 ^PWMIN2-LO-1
PWM Input _PWMIN2-HI-2
PWMIN2-LO-2
PWM Inputs From
PWM/System Controller
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM1-8
Input Pins
PWM Input Mapping To Output Stages
Configuration “00”
2 x 4-Quadrant Full-Bridge Outputs
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTA
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTB
Channel 1
Output
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTC
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTD
Channel 2
Output
FIGURE 11. CONFIGURATION “00” PWM INPUT-TO-OUTPUT POWER STAGE MAPPING
Channel 1
PWM Input
PWMIN1-HI
PWMIN1-LO
Channel 2
PWM Input
PWMIN2-HI
PWMIN2-LO
PWM Inputs From
PWM/System Controller
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM1-8
Input Pins
PWM Input Mapping To Output Stages
Configuration “01”
2 x Full Bridge , 2-Quadrant Output
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTA
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTB
Channel 1
Output
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTC
(HVDD)
High
Side
FET
Low
Side
FET
(HGND)
OUTD
Channel 2
Output
FIGURE 12. CONFIGURATION “01” PWM INPUT-TO-OUTPUT POWER STAGE MAPPING
15
FN7678.0
September 3, 2010