ISL62882 Datasheet, PDF (3/42 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62882, ISL62882B
Functional Pin Descriptions
ISL62882 ISL62882B
SYMBOL
DESCRIPTION
-
7
GND
Signal common of the IC. Unless otherwise stated, signals are referenced to the
GND pin.
1
2
PGOOD
Power-Good open-drain output indicating when the regulator is able to supply
regulated voltage. Pull-up externally with a 680Ω resistor to VCCP or 1.9kΩ to
3.3V.
2
3
PSI#
Low load current indicator input. When asserted low, indicates a reduced load
current condition.
3
4
RBIAS
A resistor to GND sets internal current reference. Use 147kΩ or 47kΩ. The choice
of Rbias value, together with the ISEN2 pin configuration and the external
resistance from the COMP pin to GND, programs the controller to enable/disable
the overshoot reduction function and to select the CPU/GPU mode.
4
5
VR_TT#
Thermal overload output indicator.
5
6
NTC
Thermistor input to VR_TT# circuit.
6
8
VW
A resistor from this pin to COMP programs the switching frequency (8kΩ gives
approximately 300kHz).
7
9
COMP
This pin is the output of the error amplifier. Also, a resistor across this pin and
GND adjusts the overcurrent threshold.
8
10
FB
This pin is the inverting input of the error amplifier.
9
11
FB2
There is a switch between the FB2 pin and the FB pin. The switch is on in 2-phase
mode and is off in 1-phase mode. The components connecting to FB2 are used to
adjust the compensation in 1-phase mode to achieve optimum performance.
10
13
ISEN2
Individual current sensing for Phase 2. When ISEN2 is pulled to 5V VDD, the
controller will disable Phase 2.
11
14
ISEN1
Individual current sensing for phase 1.
12
15
VSEN
Remote core voltage sense input. Connect to microprocessor die.
13
16
RTN
Remote voltage sensing return. Connect to ground at microprocessor die.
14, 15
17, 18 ISUM- and ISUM+ Droop current sense input.
16
19
VDD
5V bias power.
17
20
VIN
Battery supply voltage, used for feed-forward.
18
22
IMON
An analog output. IMON outputs a current proportional to the regulator output
current.
19
24
BOOT1
Connect an MLCC capacitor across the BOOT1 and the PHASE1 pins. The boot
capacitor is charged through an internal boot diode connected from the VCCP pin
to the BOOT1 pin, each time the PHASE1 pin drops below VCCP minus the voltage
dropped across the internal boot diode.
20
25
UGATE1
Output of the Phase-1 high-side MOSFET gate driver. Connect the UGATE1 pin to
the gate of the Phase-1 high-side MOSFET.
21
26
PHASE1
Current return path for the Phase-1 high-side MOSFET gate driver. Connect the
PHASE1 pin to the node consisting of the high-side MOSFET source, the low-side
MOSFET drain, and the output inductor of Phase-1.
22
27
VSSP1
Current return path for the Phase-1 low-side MOSFET gate driver. Connect the
VSSP1 pin to the source of the Phase-1 low-side MOSFET through a low
impedance path, preferably in parallel with the traces connecting the LGATE1a
and the LGATE1b pins to the gates of the Phase-1 low-side MOSFETs.
23
28
LGATE1a
Output of the Phase-1 low-side MOSFET gate driver that is always active. Connect
the LGATE1a pin to the gate of the Phase-1 low-side MOSFET that is active all the
time.
3
FN6890.2
April 29, 2010