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ISL62882 Datasheet, PDF (14/42 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs
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ISL62882, ISL62882B
VDD
VR_ON
DAC
5mV/µs
2.5mV/µs
90% Vboot
800µs
VID
COMMAND
VOLTAGE
13 SWITCHING
CYCLES
CLK_EN#
PGOOD
~7ms
FIGURE 10. SOFT-START WAVEFORMS FOR CPU VR
APPLICATION
VDD
VR_ON
SLEW
RATE
90%
120µs
VID COMMAND
VOLTAGE
DAC
13 SWITCHING
CYCLES
CLK_EN#
PGOOD
~7ms
FIGURE 11. SOFT-START WAVEFORMS FOR GPU VR
APPLICATION
voltage set by the VID pins. The slew rate is 5mV/µs
when there is DPRSLPVR = 0, and is doubled when there
is DPRSLPVR = 1. Once the output voltage is within 10%
of the target voltage for 13 PWM cycles (43µs for
frequency = 300kHz), CLK_EN# is pulled low. PGOOD is
asserted high in approximately 7ms. Similar results occur
if VR_ON is tied to VDD, with the soft-start sequence
starting 120µs after VDD crosses the POR threshold.
Voltage Regulation and Load Line
Implementation
After the start sequence, the ISL62882 regulates the
output voltage to the value set by the VID inputs per
Table 1. The ISL62882 will control the no-load output
voltage to an accuracy of ±0.5% over the range of
0.75V to 1.5V. A differential amplifier allows voltage
sensing for precise voltage regulation at the
microprocessor die.
TABLE 1. VID TABLE
VO
VID6 VID5 VID4 VID3 VID2 VID1 VID0 (V)
0
0
0
0
0
0
0 1.5000
0
0
0
0
0
0
1 1.4875
0
0
0
0
0
1
0 1.4750
0
0
0
0
0
1
1 1.4625
0
0
0
0
1
0
0 1.4500
0
0
0
0
1
0
1 1.4375
TABLE 1. VID TABLE (Continued)
VO
VID6 VID5 VID4 VID3 VID2 VID1 VID0 (V)
0
0
0
0
1
1
0 1.4250
0
0
0
0
1
1
1 1.4125
0
0
0
1
0
0
0 1.4000
0
0
0
1
0
0
1 1.3875
0
0
0
1
0
1
0 1.3750
0
0
0
1
0
1
1 1.3625
0
0
0
1
1
0
0 1.3500
0
0
0
1
1
0
1 1.3375
0
0
0
1
1
1
0 1.3250
0
0
0
1
1
1
1 1.3125
0
0
1
0
0
0
0 1.3000
0
0
1
0
0
0
1 1.2875
0
0
1
0
0
1
0 1.2750
0
0
1
0
0
1
1 1.2625
0
0
1
0
1
0
0 1.2500
0
0
1
0
1
0
1 1.2375
0
0
1
0
1
1
0 1.2250
0
0
1
0
1
1
1 1.2125
0
0
1
1
0
0
0 1.2000
0
0
1
1
0
0
1 1.1875
0
0
1
1
0
1
0 1.1750
0
0
1
1
0
1
1 1.1625
0
0
1
1
1
0
0 1.1500
0
0
1
1
1
0
1 1.1375
0
0
1
1
1
1
0 1.1250
0
0
1
1
1
1
1 1.1125
0
1
0
0
0
0
0 1.1000
0
1
0
0
0
0
1 1.0875
0
1
0
0
0
1
0 1.0750
0
1
0
0
0
1
1 1.0625
0
1
0
0
1
0
0 1.0500
0
1
0
0
1
0
1 1.0375
0
1
0
0
1
1
0 1.0250
0
1
0
0
1
1
1 1.0125
0
1
0
1
0
0
0 1.0000
0
1
0
1
0
0
1 0.9875
0
1
0
1
0
1
0 0.9750
0
1
0
1
0
1
1 0.9625
0
1
0
1
1
0
0 0.9500
0
1
0
1
1
0
1 0.9375
0
1
0
1
1
1
0 0.9250
0
1
0
1
1
1
1 0.9125
0
1
1
0
0
0
0 0.9000
14
FN6890.2
April 29, 2010
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