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ISL62882 Datasheet, PDF (17/42 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs
ISL62882, ISL62882B
ISEN2
INTERNAL
TO IC
ISEN1
V2p
PHASE2
Rs
Cs Rs
Rs
Rs
Cs
PHASE1
V1p
L2
Rdcr2 V2n Rpcb2
IL2
VO
L1
Rdcr1
Rpcb1
V1n
IL1
FIGURE 14. DIFFERENTIAL-SENSING CURRENT
BALANCING CIRCUIT
Sometimes, it is difficult to implement symmetrical
layout. For the circuit Figure 13 shows, asymmetric
layout causes different Rpcb1 and Rpcb2 thus current
imbalance. Figure 14 shows a differential-sensing current
balancing circuit recommended for ISL62882. The
current sensing traces should be routed to the inductor
pads so they only pick up the inductor DCR voltage. Each
ISEN pin sees the average voltage of two sources: its
own phase inductor phase-node pad, and the other
phase inductor output side pad. Equations 7 and 8 give
the ISEN pin voltages:
VISEN1 = V1p + V2n
(EQ. 7)
REP RATE = 10kHz
REP RATE = 25kHz
REP RATE = 50kHz
VISEN2 = V2p + V1n
(EQ. 8)
The ISL62882 will make VISEN1 = VISEN2. So there are:
V1p + V2n = V2p + V1n
(EQ. 9)
Rewriting Equation 9 gives:
V1p – V1n = V2p – V2n
(EQ. 10)
REP RATE = 100kHz
Therefore:
Rdcr1 × IL1 = Rdcr2 × IL2
(EQ. 11)
Current balancing (IL1 = IL2) will be achieved when there
is Rdcr1 = Rdcr2. Rpcb1 and Rpcb2 will not have any
effect.
Since the slave ripple capacitor voltages mimic the
inductor currents, R3™ modulator can naturally achieve
excellent current balancing during steady state and
dynamic operations. Figure 15 shows current balancing
performance of the ISL62882 evaluation board with load
transient of 15A/50A at different rep rates. The inductor
currents follow the load current dynamic change with the
output capacitors supplying the difference. The inductor
currents can track the load current well at a low rep rate,
but cannot keep up when the rep rate gets into the
hundred-kHz range, where it’s out of the control loop
bandwidth. The controller achieves excellent current
balancing in all cases.
REP RATE = 200kHz
FIGURE 15. ISL62882 EVALUATION BOARD CURRENT
BALANCING DURING DYNAMIC
OPERATION. Ch1: IL1, Ch2: IIoad, Ch3:
IL2
17
FN6890.2
April 29, 2010