ISL62881C_14 Datasheet, PDF (3/37 Pages) Intersil Corporation – Single-Phase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62881C, ISL62881D
Pin Function Description (Continued)
ISL62881C ISL62881D
4
6
5
7
6
8
SYMBOL
VW
COMP
FB
DESCRIPTION
A resistor from this pin to COMP programs the switching frequency (8kΩ gives
approximately 300kHz).
This pin is the output of the error amplifier. Also, a resistor across this pin and GND
adjusts the overcurrent threshold.
This pin is the inverting input of the error amplifier.
7
8
9, 10
9
10
11, 12
VSEN Remote core voltage sense input. Connect to microprocessor die.
RTN
Remote voltage sensing return. Connect to ground at microprocessor die.
ISUM- and Droop current sense input.
ISUM+
11
13
VDD
5V bias power.
12
14
VIN
Power stage supply voltage, used for feed-forward.
13
15
IMON An analog output. IMON outputs a current proportional to the regulator output
current.
14
16
BOOT Connect an MLCC capacitor across the BOOT and the PHASE pin. The boot capacitor
is charged through an internal boot diode connected from the VCCP pin to the BOOT
pin, each time the PHASE pin drops below VCCP minus the voltage dropped across the
internal boot diode.
15
17
UGATE Output of the high-side MOSFET gate driver. Connect the UGATE pin to the gate of the
high-side MOSFET.
16
18
PHASE Current return path for the high-side MOSFET gate driver. Connect the PHASE pin to
the node consisting of the high-side MOSFET source, the low-side MOSFET drain, and
the output inductor.
17
19
VSSP Current return path for the low-side MOSFET gate driver. Connect the VSSP pin to the
source of the low-side MOSFET through a low impedance path, preferably in parallel
with the traces connecting the LGATE pins to the gates of the low-side MOSFET.
18
-
LGATE Output of the low-side MOSFET gate driver. Connect the LGATE1 pin to the gate of the
Phase-1 low-side MOSFET.
-
20
LGATEa Output of the low-side MOSFET gate driver that is always active. Connect the LGATEa
pin to the gate of the low-side MOSFET that is active all the time.
-
19
20, 21, 22,
23, 24, 25,
26
27
28
pad
21
LGATEb Another output of the low-side MOSFET gate driver. This gate driver will be pulled low
when the DPRSLPVR pin logic is high. Connect the LGATEb pin to the gate of the
low-side MOSFET that is idle in deeper sleep mode.
22
VCCP Input voltage bias for the internal gate drivers. Connect +5V to the VCCP pin.
Decouple with at least 1µF of an MLCC capacitor to the VSSP pin.
23, 24, 25,
26, 27, 28
29
VID0,
VID1,
VID2,
VID3,
VID4,
VID5, VID6
VID input with VID0 = LSB and VID6 = MSB.
30
VR_ON Voltage regulator enable input. A high level logic signal on this pin enables the
regulator.
31
DPRSLPVR Deeper sleep enable signal. A high level logic signal on this pin indicates that the
microprocessor is in deeper sleep mode.
BOTTOM The bottom pad is electrically connected to the GND pin inside the IC. It should also
be used as the thermal pad for heat removal.
3
FN7596.0
March 8, 2010