ISL62881C_14 Datasheet, PDF (14/37 Pages) Intersil Corporation – Single-Phase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62881C, ISL62881D
to V_DD, with the soft-start sequence starting 120µs after
V_DD crosses the POR threshold.
Figure 11 shows the typical start-up timing when the
ISL62881C is configured for GPU VR application. The
ISL62881C uses digital soft-start to ramp-up DAC to the
voltage set by the VID pins at 5mV/µs. Once the output
voltage is within 10% of the target voltage for 13 PWM
cycles (43µs for frequency = 300kHz), CLK_EN# is
pulled low. PGOOD is asserted high in approximately
7ms. Similar results occur if VR_ON is tied to V_DD, with
the soft-start sequence starting 120µs after V_DD crosses
the POR threshold.
Voltage Regulation and Load Line
Implementation
After the start sequence, the ISL62881C regulates the
output voltage to the value set by the VID inputs per
Table 1. The ISL62881C will control the no-load output
voltage to an accuracy of ±0.5% over the range of
0.75V to 1.5V. A differential amplifier allows voltage
sensing for precise voltage regulation at the
microprocessor die.
TABLE 1. VID TABLE
V_O
VID6 VID5 VID4 VID3 VID2 VID1 VID0 (V)
0
0
0
0
0
0
0 1.5000
0
0
0
0
0
0
1 1.4875
0
0
0
0
0
1
0 1.4750
0
0
0
0
0
1
1 1.4625
0
0
0
0
1
0
0 1.4500
0
0
0
0
1
0
1 1.4375
0
0
0
0
1
1
0 1.4250
0
0
0
0
1
1
1 1.4125
0
0
0
1
0
0
0 1.4000
0
0
0
1
0
0
1 1.3875
0
0
0
1
0
1
0 1.3750
0
0
0
1
0
1
1 1.3625
0
0
0
1
1
0
0 1.3500
0
0
0
1
1
0
1 1.3375
0
0
0
1
1
1
0 1.3250
0
0
0
1
1
1
1 1.3125
0
0
1
0
0
0
0 1.3000
0
0
1
0
0
0
1 1.2875
0
0
1
0
0
1
0 1.2750
0
0
1
0
0
1
1 1.2625
0
0
1
0
1
0
0 1.2500
0
0
1
0
1
0
1 1.2375
0
0
1
0
1
1
0 1.2250
0
0
1
0
1
1
1 1.2125
0
0
1
1
0
0
0 1.2000
TABLE 1. VID TABLE (Continued)
V_O
VID6 VID5 VID4 VID3 VID2 VID1 VID0 (V)
0
0
1
1
0
0
1 1.1875
0
0
1
1
0
1
0 1.1750
0
0
1
1
0
1
1 1.1625
0
0
1
1
1
0
0 1.1500
0
0
1
1
1
0
1 1.1375
0
0
1
1
1
1
0 1.1250
0
0
1
1
1
1
1 1.1125
0
1
0
0
0
0
0 1.1000
0
1
0
0
0
0
1 1.0875
0
1
0
0
0
1
0 1.0750
0
1
0
0
0
1
1 1.0625
0
1
0
0
1
0
0 1.0500
0
1
0
0
1
0
1 1.0375
0
1
0
0
1
1
0 1.0250
0
1
0
0
1
1
1 1.0125
0
1
0
1
0
0
0 1.0000
0
1
0
1
0
0
1 0.9875
0
1
0
1
0
1
0 0.9750
0
1
0
1
0
1
1 0.9625
0
1
0
1
1
0
0 0.9500
0
1
0
1
1
0
1 0.9375
0
1
0
1
1
1
0 0.9250
0
1
0
1
1
1
1 0.9125
0
1
1
0
0
0
0 0.9000
0
1
1
0
0
0
1 0.8875
0
1
1
0
0
1
0 0.8750
0
1
1
0
0
1
1 0.8625
0
1
1
0
1
0
0 0.8500
0
1
1
0
1
0
1 0.8375
0
1
1
0
1
1
0 0.8250
0
1
1
0
1
1
1 0.8125
0
1
1
1
0
0
0 0.8000
0
1
1
1
0
0
1 0.7875
0
1
1
1
0
1
0 0.7750
0
1
1
1
0
1
1 0.7625
0
1
1
1
1
0
0 0.7500
0
1
1
1
1
0
1 0.7375
0
1
1
1
1
1
0 0.7250
0
1
1
1
1
1
1 0.7125
1
0
0
0
0
0
0 0.7000
1
0
0
0
0
0
1 0.6875
1
0
0
0
0
1
0 0.6750
14
FN7596.0
March 8, 2010