ISL62881C_14 Datasheet, PDF (2/37 Pages) Intersil Corporation – Single-Phase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62881C, ISL62881D
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL62881CHRTZ
62881C HRTZ
-10 to +100
28 Ld 4x4 TQFN
L28.4x4
ISL62881CIRTZ
62881C IRTZ
-40 to +100
28 Ld 4x4 TQFN
L28.4x4
ISL62881DHRTZ
62881D HRTZ
-10 to +100
32 Ld 5x5 TQFN
L32.5x5E
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL62881C, ISL62881D. For more information on
MSL please see techbrief TB363.
Pin Configurations
ISL62881C
(28 LD TQFN)
TOP VIEW
ISL62881D
(32 LD TQFN)
TOP VIEW
28 27 26 25 24 23 22
CLK_EN# 1
PGOOD 2
RBIAS 3
VW 4
COMP 5
FB 6
VSEN 7
GND PAD
(BOTTOM)
21 VID1
20 VID0
19 VCCP
18 LGATE
17 VSSP
16 PHASE
15 UGATE
8 9 10 11 12 13 14
32 31 30 29 28 27 26 25
PGOOD 1
RBIAS ₂
VR_TT# 3
NTC 4
GND 5
VW 6
COMP 7
FB 8
GND PAD
(BOTTOM)
24 VID1
23 VID0
22 VCCP
21 LGATEb
20 LGATEa
19 VSSP
18 PHASE
17 UGATE
9 10 11 12 13 14 15 16
Pin Function Description
ISL62881C ISL62881D
1
32
2
1
3
2
-
3
-
4
-
5
SYMBOL
CLK_EN#
PGOOD
RBIAS
VR_TT#
NTC
GND
DESCRIPTION
Open drain output to enable system PLL clock. It goes low 13 switching cycles after
V_CORE is within 10% of V_BOOT.
Power-Good open-drain output indicating when the regulator is able to supply
regulated voltage. Pull up externally with a 680Ω resistor to VCCP or 1.9kΩ to 3.3V.
A resistor to GND sets internal current reference. A 147kΩ resistor sets the controller
for CPU core application and a 47kΩ resistor sets the controller for GPU core
application.
Thermal overload output indicator.
Thermistor input to VR_TT# circuit.
Signal common of the IC. Unless otherwise stated, signals are referenced to the GND
pin.
2
FN7596.0
March 8, 2010