ISL3873A Datasheet, PDF (3/42 Pages) Intersil Corporation – Wireless LAN Integrated Medium Access Controller with Baseband Processor

ISL3873A
ISL3873A Signal Descriptions
Host Interface Pins
PIN NAME
PIN I/O TYPE
DESCRIPTION
HA0-9
5V tol, CMOS, Input, 50K Pull Down
Host PC Card Address Input, Bits 0 to 9
HCE1-
5V tol, CMOS, Input, 50K Pull Up
Host PC Card Select, Low Byte
HCE2-
5V tol, CMOS, Input, 50K Pull Up
Host PC Card Select, High Byte
HD0-15
5V tol, BiDir, 2mA, 50K Pull Down
Host PC Card Data Bus, Bit 0 to 15
HINPACK-
CMOS Output, 2mA
Host PC Card I/O Decode Confirmation
HIORD-
5V tol, CMOS, Input, 50K Pull Up
Host PC Card I/O Space Read Strobe
HIOWR-
5V tol, CMOS, Input, 50K Pull Up
Host PC Card I/O Space Write Strobe
HRDY/HIREQ- CMOS Output, 4mA
Host PC Card interrupt Request (I/O Mode), also used as PC Card
Ready (Memory Mode) output which is asserted to indicate card
initialization is complete
HOE-
5V tol, CMOS, Input, 50K Pull Up
Host PC Card Memory Attribute Space Output Enable
HREG-
5V tol, CMOS, Input, 50K Pull Up
Host PC Card Attribute Space Select
RESET
5V tol, CMOS, ST Input, 50K Pull Up
Hardware Reset. Self-asserted by internal pull-up at power-on. Clock
signal CLKIN or XTALIN must be available before negation of Reset.
Value of MD[15..0] copied to MDIR[15..0] and various control register
bits on the first MCLK following release of Reset
HSTSCHG-
CMOS Output, 4mA
Host PC Card Status Change
HWAIT-
CMOS Output, 4mA
Host Wait, asserted to indicate data transfer not complete and to force
force host bus wait states
HWE-
5V tol, CMOS Input, 50K Pull Up
Host PC Card Memory Attribute Space Write Enable
USB INTERFACE PINS
PIN NAME
PIN I/O TYPE
DESCRIPTION
USB+
CMOS BiDir, 2mA, (Also USB Transceiver)
USB, MBUS Address Bit 20, or I/O as PL5
USB-
CMOS BiDir, 2mA, (Also USB Transceiver)
USB, MBUS Address Bit 21, or I/O as PL6
USB_DETECT Input, 5V tolerant, pull-down
Sense USB VBUS to indicate cable attachment
PIN NAME
MUBE- / MA0 /
MWEH-
MA1-18
PL4-MA19
MLBE-
MOE-
MWE- / MWEL-
RAMCS-
NVCS-
MD0-7
MD8-15
Memory Interface Pins
PIN I/O TYPE
DESCRIPTION
CMOS TS Output, 2mA
MBUS Upper Byte Enable for x16 Memory; MBUS Address Bit 0 (byte)
for x8 Memory; High Byte Write Enable for 2 x8 Memories
CMOS TS Output, 2mA
MBUS Address Bits 1 to 18
CMOS BiDir, 2mA
MBUS Address Bit 19
CMOS TS Output, 2mA, 50K Pull Up
MBUS Lower Byte Enable, or I/O as PM2
CMOS TS Output, 2mA
Memory Output Enable
CMOS TS Output, 2mA
Low (or only) Byte Memory Write Enable
CMOS TS Output, 2mA
RAM Select
CMOS TS Output, 2mA
NV Memory Select
5V tol, CMOS, BiDir, 2mA, 100K Pull Up
MBUS Low Data Byte, Bits 0 to 7
5V tol, CMOS, BiDir, 2mA
50K Pull-Downs on MD15, MD14, MD13, MD11,
MD10, MD09
50K Pull-Ups MD12, MD08
MBUS High Data Byte, Bits 8 to 15
Default power up states are defined by pull-up and pull-down internal
resistors as shown. Device defaults to external EEPROM for boot up
mode. Using external 10K resistors, configure these pins according to
Table 4 to change power-up configuration
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