ISL68200 Datasheet, PDF (27/32 Pages) Intersil Corporation – Single-Phase R4 Digital Hybrid PWM Controller with Integrated Driver

ISL68200
COMPENSATION TO COUNTER
INTEGRATOR POLE
V_OUT
INTEGRATOR
FOR HIGH DC GAIN
V_COMP
Figure 28 shows the R4™ error-amplifier that does not require an
integrator for high DC gain to achieve accurate regulation. The
result to the open-loop response can be seen in Figure 29.
R4™ LOOP GAIN (dB)
L/C DOUBLE-POLE
V_DAC
FIGURE 26. CLASSICAL INTEGRATOR ERROR-AMPLIFIER
CONFIGURATION
Figure 26 illustrates the classic integrator configuration for a
voltage loop error amplifier. While the integrator provides the
high DC gain required for accurate regulation in traditional
technologies, it also introduces a low-frequency pole into the
control loop. Figure 27 shows the open-loop response that results
from the addition of an integrating capacitor in the voltage loop.
The compensation components found in Figure 26 are necessary
to achieve stability.
Because R4™ does not require a high-gain voltage loop, the
integrator can be removed, reducing the number of inherent
poles in the loop to two. The current-mode zero continues to
cancel one of the poles, ensuring a single-pole crossover for a
wide range of output filter choices. The result is a stable system
with no need for compensation components or complex
equations to properly tune the stability.
R3™ LOOP GAIN (dB)
INTEGRATOR POLE
p1
L/C DOUBLE-POLE
p2
p3
CURRENT-MODE
ZERO
z1
-20dB CROSSOVER
REQUIRED FOR STABILITY
COMPENSATOR TO
ADD z2 IS NEEDED
-20dB/dec
f (Hz)
FIGURE 27. UNCOMPENSATED INTEGRATOR OPEN-LOOP RESPONSE
R₂
V_OUT
R₁
V_COMP
V_DAC
FIGURE 28. NON-INTEGRATED R4™ ERROR-AMPLIFIER
CONFIGURATION
p1
p2
CURRENT-MODE
ZERO
z1
SYSTEM HAS 2 POLES
AND 1 ZERO
NO COMPENSATOR IS
NEEDED
-20dB/-d2e0cdB/dec
f (Hz)
FIGURE 29. UNCOMPENSATED R4™ OPEN-LOOP RESPONSE
TRANSIENT RESPONSE
In addition to requiring a compensation zero, the integrator in
traditional architectures also slows system response to transient
conditions. The change in COMP voltage is slow in response to a
rapid change in output voltage. If the integrating capacitor is
removed, COMP moves as quickly as VOUT, and the modulator
immediately increases or decreases switching frequency to
recover the output voltage.
I_OUT
V_COMP
V_OUT
R4™
t
R3™
t
t
FIGURE 30. R3™ vs R4™ IDEALIZED TRANSIENT RESPONSE
The dotted red and blue lines in Figure 30 represent the time
delayed behavior of V_OUT and V_COMP in response to a load
transient when an integrator is used. The solid red and blue lines
illustrate the increased response of R4™ in the absence of the
integrator capacitor.
To optimize transient response and improve phase margin for
very wide range applications, ISL68200 integrates a couple of
selectable AV and RR options that move DC gain and z1 point, as
shown in Figure 27. The defaulted AV gain of 42 and RR of
200kΩ however, can cover many cases and provides sufficient
gain and phase margin. For some extreme cases, lower AV gain
and bigger RR values are needed to provide a better phase
margin and improve transient ringback. The optimal choice AV
and RR can be obtained, by simple monitoring transient
response when playing with AV and RR values via the series bus.
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FN8705.1
March 7, 2016