ISL68200 Datasheet, PDF (11/32 Pages) Intersil Corporation – Single-Phase R4 Digital Hybrid PWM Controller with Integrated Driver

ISL68200
Tables 3 through 6 show the R_UP and R_DW values of each pin for
a specific system design with some tie-high and tie-low options,
which are for easy programming with reduced resistors and can
be used to validate the regulator operation during In-Circuit Test
(ICT) for 0V boot-up voltage option. Additional options are
available using Intersil’s PowerNavigator™ or Resistor Reader
calculator, please contact Intersil Application support at
www.intersil.com/en/support. DATA for corresponding registers
can be read out via series bus command (DC to DF). Note that
more options are in PowerNavigator™ GUI or Resistor Reader
calculator and the case of 10kΩ tie-high or tie-low is equivalent
0Ω tie-high or tie-low.
TABLE 3. PROG 1 RESISTOR READER EXAMPLE
R_UP
PROG1 (DC)
(kΩ)
R_DW
(kΩ)
VOUT
(V)
00h
Open
0
0.797
20h
Open
20
0.852
40h
Open
34.8
0.898
60h
Open
52.3
0.953
80h
Open
75
1.000
A0h
Open
105
1.047
C0h
Open
147
1.102
E0h
Open
499
1.203
1Fh
0
Open
1.352
3Fh
20
Open
1.500
5Fh
34.8
Open
1.797
7Fh
52.3
Open
2.500
9Fh
75
Open
3.000
BFh
105
Open
3.297
DFh
147
Open
5.000
FFh
499
Open
0.000
PROG2
(DD)
00h
20h
40h
60h
80h
A0h
C0h
E0h
1Fh
3Fh
5Fh
7Fh
9Fh
BFh
DFh
FFh
TABLE 4. PROG 2 RESISTOR READER EXAMPLE
R_UP R_DW
(kΩ) (kΩ) PWM/PFM
TEMP
COMP
PM_ADDR
(7-BIT)
Open 0
Enabled
30
60h
Open 20
Enabled
15
60h
Open 34.8 Enabled
5
60h
Open 52.3 Enabled
OFF
60h
Open 75
Disabled
30
60h
Open 105 Disabled
15
60h
Open 147 Disabled
5
60h
Open 499 Disabled
OFF
60h
0 Open Enabled
30
7F
20 Open Enabled
15
7F
34.8 Open Enabled
5
7F
52.3 Open Enabled
OFF
7F
75 Open Disabled
30
7F
105 Open Disabled
15
7F
147 Open Disabled
5
7F
499 Open Disabled
OFF
7F
TABLE 5. PROG 3 RESISTOR READER EXAMPLE
PROG3 R_UP
(DE) (kΩ)
R_DW ULTRASONIC FAULT
f_SW
(kΩ)
PFM BEHAVIOR (kHz)
R4 GAIN
1x 2x
00h Open 0
Disabled
Retry
300 42 84
20h Open 21.5 Disabled
Retry
700 42 84
40h Open 34.8 Disabled Latch 300 42 84
60h Open 52.3 Disabled Latch 700 42 84
80h Open 75 Enabled
Retry 300 42 84
A0h Open 105 Enabled
Retry 700 42 84
C0h Open 147 Enabled
Latch 300 42 84
E0h Open 499 Enabled
Latch 700 42 84
1Fh
0 Open Disabled
Retry
600 1 2
3Fh 21.5 Open Disabled
Retry 1500 1 2
5Fh 34.8 Open Disabled Latch 600 1 2
7Fh 52.3 Open Disabled Latch 1500 1 2
9Fh 75 Open Enabled
Retry 600 1 2
BFh 105 Open Enabled
Retry 1500 1 2
DFh 147 Open Enabled
Latch 600 1 2
FFh 499 Open Enabled
Latch 1500 1 2
TABLE 6. PROG 4 RESISTOR READER EXAMPLE
PROG4 R_UP R_DW
(DF
(kΩ) (kΩ)
SS RATE
(mV/µs)
RR
(kΩ
AVMLTI
00h
Open
0
1.25
200
1
20h
Open 20
2.5
200
1
40h
Open 34.8
5
200
1
60h
Open 52.3
10
200
1
80h
Open 75
0.078
200
1
A0h
Open 105
0.157
200
1
C0h
Open 147
0.315
200
1
E0h
Open 499
0.625
200
1
1Fh
0
Open
1.25
800
2
3Fh
20 Open
2.5
800
2
5Fh
34.8 Open
5
800
2
7Fh
52.3 Open
10
800
2
9Fh
75 Open
0.078
800
2
BFh
105 Open
0.157
800
2
DFh
147 Open
0.315
800
2
FFh
499 Open
0.625
800
2
Submit Document Feedback ₁₁
FN8705.1
March 7, 2016