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ISL68200 Datasheet, PDF (21/32 Pages) Intersil Corporation – Single-Phase R4 Digital Hybrid PWM Controller with Integrated Driver
ISL68200
Note that if the inductor peak-to-peak current is higher or closer
to 30%, the +30% threshold could be triggered instead of the
average OCP threshold. However, the fine tune procedure still can
be used.
OVER-TEMPERATURE PROTECTION
As shown in Figure 16, there is a comparator with hysteresis to
compare the NTC pin voltage to the threshold set. When the NTC
pin voltage is lower than 22.31% of VCC voltage (typically
+136°C), it triggers Over-Temperature Protection (OTP) and shuts
down ISL68200 operation, when the NTC pin voltage is above
27.79% of VCC voltage (typically +122.4°C), it will resume
normal operation. When an OTP fault is declared, the controller
will force the LGATE and UGATE gate-driver outputs low.
PGOOD Monitor
The PGOOD pin indicates when the converter is capable of
supplying regulated voltage. If there is a fault condition of a rail’s
(VCC, PVCC, 7VLDO, or VIN) UVLO, output Overcurrent (OCP),
Overvoltage (OVP), Undervoltage (UVP), or Over-Temperature (OTP),
PGOOD is asserted low. Note that the PGOOD pin is an undefined
impedance with insufficient VCC (typically <2.5V).
Adaptive Shoot-Through Protection
The LGATE and UGATE pins are MOSFET driver outputs. The
LGATE pin drives the low-side MOSFET of the converter while the
UGATE pin drives the high-side MOSFET of the converter. Adaptive
shoot-through protection prevents a gate-driver output from
turning on until the opposite gate-driver output has fallen below
approximately 1V. The dead time shown in Figure 21 is extended
by the additional period that the falling gate voltage remains
above the 1V threshold. The high-side gate-driver output voltage
is measured across the UGATE and PHASE pins while the low-side
gate-driver output voltage is measured across the LGATE and
GND pins.
UGATE-PHASE
1V
1V
tLGFUGR
1V
LGATE-GND
tUGFLGR
1V
FIGURE 21. GATE DRIVE ADAPTIVE SHOOT-THROUGH PROTECTION
PFM Mode Operation
In PFM mode, programmable by PROG2 or series bus D0[0:0],
the switching frequency is dramatically reduced to minimize the
switching loss and significantly improve light-load efficiency. The
ISL68200 can enter and exit PFM mode seamlessly as load
changes. For high VOUT applications implemented with high Qg
MOSFETs, the LGATE might not turn on long enough to charge the
boot capacitor in PFM mode with 0A load. It is recommended to
enable ISL68200’s ultrasonic PFM feature (by PROG3 or series
bus D2[0:0]), which maintains LGATE switching frequency above
20kHz and keeps the boot capacitor charged for immediate load
apply event. Alternatively, an external Schottky diode or
maintaining a minimum load can enhance the boot capacitor
charge.
SMBus, PMBus and I2C Operation
The ISL68200 features SMBus, PMBus and I2C with 32
programmable addresses via PROG2 pin, while SMBus/PMBus
includes an Alert# line (SALERT) and Packet Error Check (PEC) to
ensure data properly transmitted. The telemetry update rate is
108µs (Typically). The supported SMBus/PMBus/I2C addresses
are summarized in Table 10. The 7-bit format address does not
include the last bit (write and read): 40-47h, 60-67h and 70-7Fh.
SMBus/PMBus/I2C allows to program the registers as in
Table 11, except for SMBus/PMBus/I2C addresses, 5.5ms
(typically, worst 6.6ms) after all rails (VCC, PVCC, 7VLDO and VIN)
above POR. Figures 22 and 23 on page 22 show the initialization
timing diagram for the series bus with different state of EN
(enable) pin.
For proper operation, users should follow the SMBus, PMBus and
I2C protocol, as shown Figure 24 on page 23. Note that STOP (P)
bit is NOT allowed before the repeated START condition when
“reading” contents of register.
When the device’s series bus is not used, simply ground the
device’s SCL, SDA and SALERT pins and do not connect them to
the bus.
TABLE 10. SMBus/PMBus/I2C 7-BIT FORMAT ADDRESS (HEX)
7-BIT ADDRESS
7-BIT ADDRESS
7-BIT ADDRESS
40
63
76
41
64
77
42
65
78
43
66
79
44
67
7A
45
70
7B
46
71
7C
47
72
7D
60
73
7E
61
74
7F
62
75
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FN8705.1
March 7, 2016