ISL6363 Datasheet, PDF (26/32 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12™ Desktop CPUs

ISL6363
conceptually shows T2(s) measurement set-up. The VR senses the
inductor current, multiplies it by a gain of the load line slope, then
adds it on top of the sensed output voltage and feeds it to the
compensator. T(1) is measured after the summing node, and T2(s)
is measured in the voltage loop before the summing node. The
spreadsheet gives both T1(s) and T2(s) plots. However, only T2(s)
can be actually measured on an ISL6363 regulator.
T1(s) is the total loop gain of the voltage loop and the droop loop.
It always has a higher crossover frequency than T2(s) and has
more meaning of system stability.
T2(s) is the voltage loop gain with closed droop loop. It has more
meaning of output voltage response.
Design the compensator to get stable T1(s) and T2(s) with
sufficient phase margin, and output impedance equal or smaller
than the load line slope.
Q1
V_IN
GATE ^Q2
DRIVER
L
VO
Cout
IO
LOAD LINE SLOPE
20
MOD.
EA
COMP
VID
LOOP GAIN = ^{CHANNEL B}
CHANNEL A
ISOLATION
TRANSFORMER
CHANNEL A
CHANNEL B
NETWORK
ANALYZER _{EXCITATION OUTPUT}
FIGURE 24. LOOP GAIN T1(s) MEASUREMENT SET-UP
Q1
VIN
GATE Q2
DRIVER
L
VO
COUT
IO
LOAD LINE SLOPE
20
MOD.
EA
COMP
VID
LOOP GAIN = ^{CHANNEL B}
CHANNEL A
ISOLATION
TRANSFORMER
CHANNEL A
CHANNEL B
NETWORK
ANALYZER EXCITATION OUTPUT
FIGURE 25. LOOP GAIN T2(s) MEASUREMENT SET-UP
26
FN6898.0
September 29, 2011