ISL12028_10 Datasheet, PDF (24/29 Pages) Intersil Corporation – Real Time Clock/Calendar with I2C Bus™ and EEPROM

ISL12028, ISL12028A
The X1 and X2 connections to the crystal are to be kept as
short as possible. A thick ground trace around the crystal is
advised to minimize noise intrusion, but ground near the X1
and X2 pins should be avoided as it will add to the load
capacitance at those pins. Keep in mind these guidelines for
other PCB layers in the vicinity of the RTC device. A small
decoupling capacitor at the V_DD pin of the chip is mandatory,
with a solid connection to ground.
For other RTC products, the same rules stated previously
should be observed, but adjusted slightly since the packages
and pinouts are slightly different.
Oscillator Measurements
When a proper crystal is selected and the layout guidelines
above are observed, the oscillator should start up in most
circuits in less than one second. Some circuits may take
slightly longer, but startup should definitely occur in less than
5 seconds. When testing RTC circuits, the most common
impulse is to apply a scope probe to the circuit at the X2 pin
(oscillator output) and observe the waveform. DO NOT DO
THIS! Although in some cases you may see a usable
waveform, due to the parasitics (usually 10pF to ground)
applied with the scope probe, there will be no useful
information in that waveform other than the fact that the
circuit is oscillating. The X2 output is sensitive to capacitive
impedance so the voltage levels and the frequency will be
affected by the parasitic elements in the scope probe.
Applying a scope probe can possibly cause a faulty oscillator
to start up, hiding other issues (although in the Intersil
RTC’s, the internal circuitry assures startup when using the
proper crystal and layout).
The best way to analyze the RTC circuit is to power it up and
read the real time clock as time advances, or if the chip has
the IRQ/F_OUT output, look at the output of that pin on an
oscilloscope (after enabling it with the control register, and
using a pull-up resistor for the open-drain output).
Alternatively, the ISL12028 IRQ/F_OUT- output can be
checked by setting an alarm for each minute. Using the
pulse interrupt mode setting, the once-per-minute interrupt
functions as an indication of proper oscillation.
TABLE 11. I²C, LV RESET, AND BATTERY BACKUP OPERATION SUMMARY (SHADED ROW IS SAME AS X1228 OPERATION)
MODE
SBIB
BIT
BSW
BIT
V_BAT
SWITCHOVER
VOLTAGE
I²C ACTIVE IN
BATTERY
BACKUP?
EE PROM WRITE/
READ IN BATTERY
BACKUP?
IRQ/FREQ
ACTIVE?
NOTES
A
0
B
0
(X1228
mode)
C
1
D
1
0 Standard Mode,
NO
NO
V_TRIP = 2.2V typ,
Default for
ISL12028A
1
Legacy Mode, YES, only if
YES, read only
V_DD < V_BAT
Default for
V_BAT > V_RESET
ISL12028,
0 Standard Mode,
NO
NO
V_TRIP = 2.2V typ
1
Legacy Mode,
NO
NO
V_DD < V_BAT
YES
YES
YES
YES
Operation of I²C bus down to
V_DD = V_RESET, then below that no
communications. Battery switchover
at V_TRIP.
Operation of I²C bus into battery
backup mode, but only for
V_BAT>V_DD>V_RESET.
Bus must have pull-ups to V_BAT. No
nonvolatile writes with V_BAT>V_DD
Operation of I²C bus down to
V_DD = V_RESET, then below that no
communications. Battery switchover
at V_TRIP.
Operation of I²C bus down to V_RESET
or V_BAT, whichever is higher.
24
FN8233.8
August 9, 2010