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ISL6313_14 Datasheet, PDF (23/33 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications
ISL6313
completed. In the case of an undervoltage event, PGOOD
will return high when the output voltage rises above the
undervoltage hysteresis level. PGOOD is always low prior to
the end of soft-start.
For AMD modes of operation, PGOOD will always be high
as long as VSEN is within the specified undervoltage,
overvoltage window and soft-start has ended. PGOOD only
goes low if VSEN is outside this window. Even if the
controller is shut down the PGOOD signal will still stay high
until VSEN falls below the undervoltage threshold.
Overvoltage Protection
The ISL6313 constantly monitors the difference between the
VSEN and RGND voltages to detect if an overvoltage event
occurs. During soft-start, while the DAC is ramping up, the
overvoltage trip level is the higher of a fixed voltage 1.260V or
DAC + 175mV for Intel modes of operation and DAC + 225mV
for AMD modes of operation. Upon successful soft-start, the
overvoltage trip level is only DAC + 175mV or DAC + 225mV
depending on whether the controller is running in Intel or AMD
mode. When the output voltage rises above the OVP trip level
actions are taken by the ISL6313 to protect the microprocessor
load.
At the inception of an overvoltage event, LGATE1 and
LGATE2 are commanded high and the PGOOD signal is
driven low. This turns on the all of the lower MOSFETs and
pulls the output voltage below a level that might cause
damage to the load. The LGATE outputs remain high until
VSEN falls 100mV below the OVP threshold that tripped the
overvoltage protection circuitry. The ISL6313 will continue to
protect the load in this fashion as long as the overvoltage
condition recurs. Once an overvoltage condition ends the
ISL6313 latches off, and must be reset by toggling EN, or
through POR, before a soft-start can be reinitiated.
There is an OVP condition that exists that will not latch off the
ISL6313. During a soft-start sequence, if the VSEN voltage is
above the OVP threshold an overvoltage event will occur, but
will be released once VSEN falls 100mV below the OVP
threshold. If VSEN then rises above the OVP trip threshold a
second time, the ISL6313 will be latched off and cannot be
restarted until the controller is reset.
Pre-POR Overvoltage Protection
Prior to PVCC and VCC exceeding their POR levels, the
ISL6313 is designed to protect the load from any overvoltage
events that may occur. This is accomplished by means of an
internal 10kΩ resistor tied from PHASE to LGATE, which
turns on the lower MOSFET to control the output voltage
until the overvoltage event ceases or the input power supply
cuts off. For complete protection, the low side MOSFET
should have a gate threshold well below the maximum
voltage rating of the load/microprocessor.
In the event that during normal operation the PVCC or VCC
voltage falls back below the POR threshold, the pre-POR
overvoltage protection circuitry reactivates to protect from
any more pre-POR overvoltage events.
Undervoltage Detection
The undervoltage threshold is set at DAC - 350mV of the
VID code. When the output voltage (VSEN - RGND) is below
the undervoltage threshold, PGOOD gets pulled low. No
other action is taken by the controller. PGOOD will return
high if the output voltage rises above DAC - 250mV.
Open Sense Line Prevention
In the case that either of the remote sense lines, VSEN or
GND, become open, the ISL6313 is designed to prevent the
controller from regulating. This is accomplished by means of
a small 5µA pull-up current on VSEN, and a pull-down
current on RGND. If the sense lines are opened at any time,
the voltage difference between VSEN and RGND will
increase until an overvoltage event occurs, at which point
overvoltage protection activates and the controller stops
regulating. The ISL6313 will be latched off and cannot be
restarted until the controller is reset.
Overcurrent Protection
The ISL6313 takes advantage of the proportionality between
the load current and the average current, IAVG, to detect an
overcurrent condition. Two different methods of detecting
overcurrent events are available on the ISL6313. The first
method continually compares the average sense current
with a constant 100µA OCP reference current as shown in
Figure 16. Once the average sense current exceeds the
OCP reference current, a comparator triggers the converter
to begin overcurrent protection procedures.
For this first method the overcurrent trip threshold is dictated
by the DCR of the inductors, the number of active channels,
and the RSET pin resistor, RSET. To calculate the
overcurrent trip level, IOCP, using this method use
Equation 23, where N is the number of active channels, DCR
is the individual inductor’s DCR, and RSET is the RSET pin
resistor value.
IOCP
=
-1---0---0-----⋅---1---0----–---6----⋅---R-----S----E----T----⋅---N------⋅---3--
DCR ⋅ 400
(EQ. 23)
During VID-on-the-fly transitions the overcurrent trip level for
this method is boosted to prevent false overcurrent trip
events that can occur. Starting from the beginning of a
dynamic VID transition, the overcurrent trip level is boosted
to 140µA. The OCP level will stay at this boosted level until
50µs after the end of the dynamic VID transition, at which
point it will return to the typical 100µA trip level.
The second method for detecting overcurrent events
continuously compares the voltage on the IOUT pin, VIOUT,
to the overcurrent protection voltage, VOCP, as shown in
Figure 16. The average channel sense current flows out the
IOUT pin and through RIOUT, creating the IOUT pin voltage
which is proportional to the output current. When the IOUT
23
FN6448.2
September 2, 2008