ISL6313_14 Datasheet, PDF (13/33 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications

ISL6313
MOSFET
DRIVER
I_n
V_IN
IL
UGATE
L
DCR
LGATE
INDUCTOR
V_L(s)
V_C(s)
R₁
C₁
ISL6313 INTERNAL
CIRCUIT
SENSE
+
V_C(s)
ISEN-
-
R_ISEN
ISEN+
V_OUT
C_OUT
I_SEN
RSET
R_SET
VCC
FIGURE 6. INDUCTOR DCR CURRENT SENSING
CONFIGURATION
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 6. The channel current
I_L, flowing through the inductor, passes through the DCR.
Equation 4 shows the s-domain equivalent voltage, V_L,
across the inductor.
V_L(s) = I_L ⋅ (s ⋅ L + DCR)
(EQ. 4)
A simple R-C network across the inductor (R₁ and C)
extracts the DCR voltage, as shown in Figure 6. The voltage
across the sense capacitor, V_C, can be shown to be
proportional to the channel current I_L, shown in Equation 5.
⎛
⎝
--^s-----^â‹---^L---
DCR
+
1_⎠⎞
V_C(s)
=
----------------------------------------
(s ⋅ R₁ ⋅ C₁ + 1)
⋅
D
C
R
⋅
I_L
(EQ. 5)
If the R₁-C₁ network components are selected such that
their time constant matches the inductor L/DCR time
constant, then V_C is equal to the voltage drop across the
DCR.
The capacitor voltage V_C, is then replicated across the
effective internal sense resistance R_ISEN. This develops a
current through R_ISEN which is proportional to the inductor
current. This current, I_SEN, is continuously sensed and is
then used by the controller for load-line regulation,
channel-current balancing, and overcurrent detection and
limiting. Equation 6 shows that the proportion between the
channel-current, I_L, and the sensed current, I_SEN, is driven
by the value of the effective sense resistance, R_ISEN, and
the DCR of the inductor.
I_SEN
=
I_L
⋅
---^D----^C-----^R-----
R_ISEN
(EQ. 6)
The effective internal R_ISEN resistance is important to the
current sensing process because it sets the gain of the load
line regulation loop as well as the gain of the channel-current
balance loop and the overcurrent trip level. The effective
internal R_ISEN resistance is user programmable and is set
through use of the RSET pin. Placing a single resistor, R_SET,
from the RSET pin to the VCC pin programs the effective
internal R_ISEN resistance according to Equation 7. It is
important to note that the R_SET resistance value must be
between 20kΩ and 80kΩ for Equation 7 to be valid.
R_ISEN
=
----³-----
400
⋅
R_S
E
T
*Note: R_SET must be between 20kΩ and 80kΩ
(EQ. 7)
Output Voltage Setting
The ISL6313 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3 or 4. In the Intel
VR11 mode of operation, each VID pin is pulled up to an
internal 1.2V voltage by a weak current source (40µA),
which decreases to 0A as the voltage at the VID pin varies
from 0 to the internal 1.2V pull-up voltage. In AMD modes of
operation the VID pins are pulled low by a week 20µA
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
._{The ISL6313 accommodates three different DAC ranges:}
Intel VR11, AMD K8/K9 5-bit, and AMD 6-bit. The state of
the SS and VID7 pins decide which DAC version is active.
Refer to Table 1 for a description of how to select the desired
DAC version.
TABLE 1. ISL6313 DAC SELECT TABLE
DAC VERSION
SS PIN
VID7 PIN
INTEL VR11
R_SS resistor tied to
-
GND
AMD 5-bit
R_SS resistor tied to
high
VCC
AMD 6-bit
R_SS resistor tied to
low
VCC
TABLE 2. VR11 VOLTAGE IDENTIFICATION CODES
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VDAC
0
0
0
0
0
0
0
0
OFF
0
0
0
0
0
0
0
1
OFF
0
0
0
0
0
0
1
0 1.60000
0
0
0
0
0
0
1
1 1.59375
13
FN6448.2
September 2, 2008