ISL6566A Datasheet, PDF (22/28 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with Two Integrated MOSFET Drivers and One External Driver Signal

ISL6566A
PHASE3
To External Driver
PHASE Pin
PHASE2
PHASE1
ISUM
V_L(s)
L
DCR
INDUCTOR
IL₃
R_S
L
DCR
INDUCTOR
IL₂
R_S
L
DCR
INDUCTOR
IL₁
R_S
I_OUT
C_OUT
ICOMP
-
V_DROOP
+ ^IREF
C_COMP R_COMP
(optional)
ISL6566A
FIGURE 18. DCR SENSING CONFIGURATION
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R_COMP to match the time constants
correctly. The effects of time constant mismatch can be seen
in the form of droop overshoot or undershoot during the
initial load transient spike, as shown in Figure 19. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
1. Capture a transient event with the oscilloscope set to
about L/DCR/2 (sec/div). For example, with L = 1µH and
DCR = 1mΩ, set the oscilloscope to 500µs/div.
2. Record ∆V1 and ∆V2 as shown in Figure 19.
3. Select a new value, R_COMP,2, for the time constant
resistor based on the original value, R_COMP,1, using the
following equation.
R_{COMP, 2}
=
R_C
O
M P,
1
⋅
∆_----V_----1--
∆V₂
(EQ. 28)
4. Replace R_COMP with the new value and check to see that
the error is corrected. Repeat the procedure if necessary.
After choosing a new value for R_COMP, it will most likely be
necessary to adjust the value of R_S to obtain the desired full
load droop voltage. Use Equation 27 to obtain the new value
for R_S.
22
∆V₂
∆V₁
V_OUT
I_TRAN
∆I
FIGURE 19. TIME CONSTANT MISMATCH BEHAVIOR
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed.
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R_C and C_C.
C₂ (OPTIONAL)
R_C ^CC
COMP
FB
ISL6566A
R_FB
VDIFF
FIGURE 20. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6566A CIRCUIT
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
Select a target bandwidth for the compensated system, f₀.
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
FN9200.2
July 27, 2005