ISL6566A Datasheet, PDF (13/28 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with Two Integrated MOSFET Drivers and One External Driver Signal

ISL6566A
TABLE 4. VRM10 VOLTAGE IDENTIFICATION CODES (Continued)
VID4 VID3 VID2 VID1 VID0 VID12.5 VDAC
1
0
0
0
1
0
1.4375
1
0
0
0
0
1
1.4500
1
0
0
0
0
0
1.4625
0
1
1
1
1
1
1.4750
0
1
1
1
1
0
1.4875
0
1
1
1
0
1
1.5000
0
1
1
1
0
0
1.5125
0
1
1
0
1
1
1.5250
0
1
1
0
1
0
1.5375
0
1
1
0
0
1
1.5500
0
1
1
0
0
0
1.5625
0
1
0
1
1
1
1.5750
0
1
0
1
1
0
1.5875
0
1
0
1
0
1
1.6000
Voltage Regulation
In order to regulate the output voltage to a specified level,
the ISL6566A uses the integrating compensation network
shown in Figure 6. This compensation network insures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6566A to include the combined tolerances of each of
these elements.
EXTERNAL CIRCUIT
R_C C_{C COMP}
R_FB
+
V_OFS
-
REF
C_REF
FB
VDIFF
+
V_OUT
-
VSEN
RGND
+
V_DROOP
-
IREF
ICOMP
ISL6566A INTERNAL CIRCUIT
VID DAC
1k
+
-
V_COMP
ERROR AMPLIFIER
I_OFS
+
+
-
- _DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6566A incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the controller ground reference point,
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The droop voltage, V_DROOP, also
feeds into the remote-sense amplifier. The remote-sense
output, V_DIFF, is therefore equal to the sum of the output
voltage, V_OUT, and the droop voltage. V_DIFF is connected to
the inverting input of the error amplifier through an external
resistor.
The output of the error amplifier, V_COMP, is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Internal MOSFET drivers
and regulate the converter output so that the voltage at FB is
equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 4. The internal and external
circuitry that controls voltage regulation is illustrated in
Figure 6.
V_OUT = V_REF – V_OFS – V_DROOP
(EQ. 4)
Load-Line (Droop) Regulation
Some microprocessor manufacturers require a precisely-
controlled output impedance. This dependence of output
voltage on load current is often termed “droop” or “load line”
regulation.
As shown in Figure 6, a voltage, V_DROOP, proportional to the
total current in all active channels, I_OUT, feeds into the
differential remote-sense amplifier. The resulting voltage at
the output of the remote-sense amplifier is the sum of the
output voltage and the droop voltage. As Equation 4 shows,
feeding this voltage into the compensation network causes
the regulator to adjust the output voltage so that it’s equal to
the reference voltage minus the droop voltage.
The droop voltage, V_DROOP, is created by sensing the
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 7. The channel current,
I_L, flowing through the inductor, passes through the DCR.
Equation 5 shows the s-domain equivalent voltage, V_L,
across the inductor.
V_L(s) = I_L ⋅ (s ⋅ L + DCR)
(EQ. 5)
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
13
FN9200.2
July 27, 2005