ISL6566A Datasheet, PDF (14/28 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with Two Integrated MOSFET Drivers and One External Driver Signal

ISL6566A
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V_DROOP, can be shown to be proportional to the channel
currents I_L1, I_L2, and I_L3, shown in Equation 6.
(EQ. 6)
VDROOP(s)
=
(^---s^----⋅^---R^-----_C^-----_O^{-----}_M^-D----s-----_P^{-C---⋅------L-R-}⋅^-----C^---+--_C^--1--_O^{-----}_M^------_P^-----+-----1^----)
⋅
R_{-----C-----O-----M-----P---}
RS
⋅
(IL1
+
IL2
+
IL3)
⋅
DCR
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V_DROOP is equal to the sum of the voltage
drops across the individual DCRs, multiplied by a gain. As
Equation 7 shows, V_DROOP is therefore proportional to the
total output current, I_OUT.
V_DROOP
=
R_{-----C----O-----M-----P-}
R_S
⋅
I_OUT
⋅
DCR
(EQ. 7)
PHASE3
To External Driver
PHASE Pin
PHASE2
PHASE1
R_S
R_S
V_L(s)
L
DCR
INDUCTOR
IL₃
R_S
L
DCR
INDUCTOR
IL₂
L
DCR
INDUCTOR
IL₁
ISUM
I_OUT
V_OUT
C_OUT
ICOMP
-
V_DROOP
+ ^IREF
C_COMP R_COMP
(optional)
ISL6566A
FIGURE 7. DCR SENSING CONFIGURATION
By simply adjusting the value of R_S, the load line can be set
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R_COMP to compensate for the rise in DCR due to
temperature.
Note: An optional 10nF ceramic capacitor from the ISUM pin
to the IREF pin is recommended to help reduce any noise
affects on the current sense amplifier due to layout.
Output-Voltage Offset Programming
The ISL6566A allows the designer to accurately adjust the
offset voltage by connecting a resistor, R_OFS, from the OFS
pin to VCC or GND. When R_OFS is connected between OFS
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (I_OFS) to flow into the OFS pin
and out of the FB pin. If R_OFS is connected to ground, the
voltage across it is regulated to 0.5V, and I_OFS flows into the
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (I_OFS x
R_FB). These functions are shown in Figures 8 and 9.
VDIFF
+
V_{OFS RFB}
-
VREF
E/A
FB
I_OFS
R_OFS
OFS
ISL6566A
GND
+
0.5V
-
-
1.5V
+
GND
VCC
FIGURE 8. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
14
FN9200.2
July 27, 2005