ISL6314 Datasheet, PDF(22/32 Page) Intersil Corporation – Single-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications

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ISL6314 Datasheet, PDF (22/32 Pages) Intersil Corporation – Single-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications

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ISL6314

ISEN+

ISEN-

ISENO

ROCSET

- VOCSET +

OCSET

ISEN

VDROOP

100ÂµA

VDIFF

+1V

VID + OFFSET mV

VOVP

VSEN

RGND

SOFT-START, FAULT

AND CONTROL LOGIC

PGOOD

VID - OFFSET mV ISL6314 INTERNAL CIRCUITRY

FIGURE 14. POWER-GOOD AND PROTECTION CIRCUITRY

Power-Good Signal

The power-good pin (PGOOD) is an open-drain logic output

that signals whether or not the ISL6314 is regulating the

output voltage within the proper levels, and whether any fault

conditions exist. This pin should be tied through a resistor to

a voltage source thatâs equal to or less than VCC.

For Intel mode of operation, PGOOD indicates whether VSEN

is within specified overvoltage and undervoltage limits after a

fixed delay from the end of soft-start. PGOOD transitions low

when an undervoltage, overvoltage, or overcurrent condition

is detected or when the controller is disabled by a reset from

EN, POR, or one of the no-CPU VID codes. In the event of

an overvoltage or overcurrent condition, or a no-CPU VID

code, the controller latches off and PGOOD will not return

high until EN is toggled and a successful soft-start is

completed. In the case of an undervoltage event, PGOOD

will return high when the output voltage rises above the

undervoltage hysteresis level. PGOOD is always low prior to

the end of soft-start.

For AMD modes of operation, PGOOD will always be high as

long as VSEN is within the specified undervoltage/overvoltage

window and soft-start has ended. PGOOD only goes low if

VSEN is outside this window. Even if the controller is shut

down the PGOOD signal will still stay high until VSEN falls

below the undervoltage threshold.

Overvoltage Protection

The ISL6314 constantly monitors the difference between the

VSEN and RGND voltages to detect if an overvoltage event

occurs. During soft-start, while the DAC is ramping up, the

overvoltage trip level is the higher of a fixed voltage 1.27V or

DAC + 175mV for Intel modes of operation and DAC + 225mV

for AMD modes of operation. Upon successful soft-start, the

overvoltage trip level is only DAC + 175mV or DAC + 225mV

depending on whether the controller is running in Intel or AMD

mode. When the output voltage rises above the OVP trip level

actions are taken by the ISL6314 to protect the microprocessor

load.

At the inception of an overvoltage event, LGATE is

commanded high and the PGOOD signal is driven low. This

turns on the lower MOSFETs and pulls the output voltage

below a level that might cause damage to the load. The

LGATE output remains high until VSEN falls 100mV below

the OVP threshold that tripped the overvoltage protection

circuitry. The ISL6314 will continue to protect the load in this

fashion as long as the overvoltage condition recurs. Once an

overvoltage condition ends, the ISL6314 latches off, and

must be reset by toggling EN, or through POR, before a

soft-start can be reinitiated.

There is an OVP condition that exists that will not latch off the

ISL6314. During a soft-start sequence, if the VSEN voltage is

above the OVP threshold an overvoltage event will occur, but

will be released once VSEN falls 100mV below the OVP

threshold. If VSEN then rises above the OVP trip threshold a

second time, the ISL6314 will be latched off and cannot be

restarted until the controller is reset.

Pre-POR Overvoltage Protection

Prior to PVCC and VCC exceeding their POR levels, the

ISL6314 is designed to protect the load from any overvoltage

events that may occur. This is accomplished by means of an

turns on the lower MOSFET to control the output voltage

until the overvoltage event ceases or the input power supply

cuts off. For complete protection, the low side MOSFET

should have a gate threshold well below the maximum

voltage rating of the load/microprocessor. In the event that

during normal operation the PVCC or VCC voltage falls back

below the POR threshold, the pre-POR overvoltage

protection circuitry reactivates to protect from any more

pre-POR overvoltage events.

Undervoltage Detection

The undervoltage threshold is set at DAC - 350mV of the

VID code. When the output voltage (VSEN - RGND) is below

the undervoltage threshold, PGOOD gets pulled low. No

other action is taken by the controller. PGOOD will return

high if the output voltage rises above DAC - 250mV.

FN6455.2

October 8, 2009

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