ISL12026_08 Datasheet, PDF (22/24 Pages) Intersil Corporation – Real Time Clock/Calendar with I2C Bus™ and EEPROM

ISL12026, ISL12026A
BIT
ALARM0
REGISTER 7 6 5 4 3 2 1 0 HEX
DESCRIPTION
SCA0
1 0 1 1 0 0 0 0 B0h Seconds set to 30,
enabled
MNA0 0 0 0 0 0 0 0 0 00h Minutes disabled
HRA0 0 0 0 0 0 0 0 0 00h Hours disabled
DTA0 0 0 0 0 0 0 0 0 00h Date disabled
MOA0 0 0 0 0 0 0 0 0 00h Month disabled
DWA0 0 0 0 0 0 0 0 0 00h Day of week disabled
BIT
CONTROL
REGISTER 7 6 5 4 3 2 1 0 HEX
DESCRIPTION
INT 1 0 1 0 0 0 0 0 x0h Enable Alarm and Int
Mode
Once the registers are set, the following waveform will be
seen at IRQ/F_OUT:
RTC AND ALARM REGISTERS ARE BOTH “30” SEC
60s
Note that the status register AL0 bit will be set each time the
alarm is triggered, but does not need to be read or cleared.
I²C Communications During Battery Backup
Operation in Battery Backup mode is affected by the BSW
and SBIB bits as described earlier. These bits allow flexible
operation of the serial bus and EEPROM in battery backup
mode, but certain operational details need to be clear before
utilizing the different modes. Table 9 describes 4 different
modes possible with using the BSW and SBIB bits, and how
they are affect the serial interface and battery backup
operation.
• Mode A - In this mode, selection bits indicate a Standard
Mode switchover combined with I²C operation in battery
backup mode. When the V_DD voltage drops below the lower
of V_TRIP or V_BAT, then the device will enter battery backup
mode. If the microcontroller and bus pull-ups are also
powered by the battery, then the ISL12026 can
communicate in battery backup mode.
• Mode B - In this mode, selection bits indicate Legacy mode
switchover combined with I²C operation in battery backup
mode. When the V_DD voltage drops below V_BAT, the device
will enter battery backup mode. If the microcontroller and
bus pull-ups are also powered by the battery, then the
ISL12026 can communicate in battery backup mode. This
mode places the ISL12026 device in the same operating
mode as the X1226 legacy device.
• Mode C - This mode combines Standard mode battery
switchover with no I²C operation in battery backup mode.
When the V_DD voltage drops below the lower of V_TRIP or
V_BAT, then the device will enter battery backup mode and
the I²C interface will be disabled, minimizing V_BAT current
drain.
• Mode D - This mode combines Legacy mode battery
switchover with no I²C operation in battery backup mode.
When the V_DD voltage drops below V_BAT, the device will
enter battery backup mode and the I²C interface will be
disabled, minimizing V_BAT current drain.
Note that the IRQ/F_OUT open drain output pin is active in
battery backup for all modes, allowing clocking of devices
while in battery backup mode. The pull-up on the pin will
need to go to V_BAT, and thus battery mode current draw will
increase accordingly.
TABLE 9.
MODE
V_BAT
I²C ACTIVE IN EE PROM WRITE/
SWITCHOVER BATTERY READ IN BATTERY
SBIB BIT BSW BIT VOLTAGE
BACKUP?
BACKUP?
FREQ/IRQ
ACTIVE?
NOTES
A
0
B (X1226
0
Mode)
0
Standard Mode,
Yes
V_TRIP = 2.2V typ
1
Legacy Mode,
Yes
V_DD < V_BAT
NO
YES, needs V_BAT switchover at lower of V_BAT or
pull-up to V_BAT V_TRIP. Pull-ups needed on I²C to
V_BAT to operate in Battery Backup.
NO
YES, needs V_BAT switchover at <V_DD. Pull-ups
pull-up to V_BAT needed on I²C to V_BAT to operate in
Battery Backup.
C
1
0
Standard Mode,
NO
V_TRIP = 2.2V typ
D
1
1
Legacy Mode,
NO
V_DD < V_BAT
NO
YES, needs V_BAT switchover at lower of V_BAT or
pull-up to V_BAT V_TRIP.
NO
YES, needs V_BAT switchover at <V_DD.
pull-up to V_BAT
22
FN8231.8
October 28, 2008