ISL6310_06 Datasheet, PDF (20/27 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

PHASE1
PHASE2
ISUM
ISL6310
V_L(s)
L
DCR
I_OUT
INDUCTOR
V_OUT
IL₁
R_S
C_OUT
ΔV₁
L
DCR
INDUCTOR
IL₂
R_S
ΔV₂
V_OUT
I_TRAN
ΔI
ICOMP
DROOP
IREF
ISL6310
C_COMP R_COMP
-
V_DROOP
+
FIGURE 18. DCR SENSING CONFIGURATION
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R_COMP to match the time constants
correctly. The effects of time constant mismatch can be seen
in the form of droop overshoot or undershoot during the
initial load transient spike, as shown in Figure 19. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
1. Capture a transient event with the oscilloscope set to
about L/DCR/2 (sec/div). For example, with L = 1μH and
DCR = 1mΩ, set the oscilloscope to 500μs/div.
2. Record ΔV₁ and ΔV₂ as shown in Figure 19.
3. Select a new value, R_COMP,2, for the time constant
resistor based on the original value, R_COMP,1, using the
following Equation 27.
R_{COMP, 2}
=
R_C
O
M P,
1
⋅
Δ_----V_----1--
ΔV₂
(EQ. 27)
4. Replace R_COMP with the new value and check to see that
the error is corrected. Repeat the procedure if necessary.
After choosing a new value for R_COMP, it will most likely be
necessary to adjust the value of R_S to obtain the desired full
load droop voltage. Use Equation 26 to obtain the new value
for R_S.
20
FIGURE 19. TIME CONSTANT MISMATCH BEHAVIOR
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
Compensating the Load-Line Regulated Converter
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R₂ and C₁.
C₂ (OPTIONAL)
R₂
C₁
COMP
FB
ISL6310
R₁
VDIFF
FIGURE 20. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6310 CIRCUIT
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
FN9209.3
December 12, 2006