ISL6252 Datasheet, PDF (20/25 Pages) Intersil Corporation – Highly Integrated Battery Charger Controller for Notebook Computers

ISL6252, ISL6252A
The Bode plot of the loop gain, the compensator gain and
the power stage gain is shown in Figure 20:
60
COMPENSATOR
f_ZERO
MODULATOR
40
LOOP
20
0
-20
f_POLE1
f_FILTER
-40
-60
0.01k
f_POLE2
0.1k
1k
10k
FREQUENCY (Hz)
100k
1M
FIGURE 20. CHARGE CURRENT LOOP BODE PLOTS
Adapter Current Limit Control Loop
If the combined battery charge current and system load
current draws current that equals the adapter current limit
set by the ACLIM pin, ISL6252 will reduce the current to the
battery and/or reduce the output voltage to hold the adapter
current at the limit. Above the adapter current limit, the
minimum current buffer equals the output of gm3 and
ICOMP controls the charger output. Figure 21 shows the
adapter current limit control loop.
.
DCIN
R_S1
R_F1
PHASE
L
11
R_FET_r_DS(ON)
R_{L_DCR}
C_F1
Σ
CSIN
CSIP
ICOMP
C_ICOMP
+
0.25
-
- ₂₀
+
CA1
+
20
-
CA2
CSOP
CSON
-
gm3
+
ACLIM +
-
R_F2
C_F2
R
C_O
R_ESR
FIGURE 21. ADAPTER CURRENT LIMIT LOOP
The loop response equations, Bode plots and the selection
of C_ICOMP are the same as the charge current control loop
with loop gain reduced by the duty cycle and the ratio of
R_S1/R_S2. In other words, if R_S1= R_S2 and the duty cycle
D = 50%, the loop gain will be 6dB lower than the loop gain
in Figure 20. This gives lower crossover frequency and
higher phase margin in this mode. If R_S1/R_S2 = 2 and the
duty cycle is 50% then the adapter current loop gain will be
identical to the gain in Figure 20.
A filter should be added between R_S1 and CSIP and CSIN to
reduce switching noise. The filter roll off frequency should be
between the crossover frequency and the switching
frequency (~100kHz).
Voltage Control Loop
When the battery is charged to the voltage set by CELLS and
VADJ the voltage error amplifier (gm1) takes control of the
output (assuming that the adapter current is below the limit set
by ACLIM). The voltage error amplifier (gm1) discharges the
capacitor on VCOMP to limit the output voltage. The current to
the battery decreases as the cells charge to the fixed voltage
and the voltage across the internal battery resistance
decreases. As battery current decreases the 2 current error
amplifiers (gm2 and gm3) output their maximum current and
charge the capacitor on ICOMP to its maximum voltage
(limited to 1.2V above VCOMP). With high voltage on ICOMP,
the minimum voltage buffer output equals the voltage on
VCOMP. The voltage control loop is shown in Figure 22.
.
PHASE
L
11
R_FET_r_DS(ON)
R_{L_DCR}
Σ
VCOMP
C_VCOMP
R_VCOMP
+
0.25
-
CA2
+
20
-
R3
-
gm1
+
R4
+
2.1V -
CSOP
CSON
R_F2
C _F2
R_S2
C_O
R_ESR
R_BAT
FIGURE 22. VOLTAGE CONTROL LOOP
Output LC Filter Transfer Functions
The gain from the phase node to the system output and
battery depend entirely on external components. Typical
output LC filter response is shown in Figure 23. Transfer
function A_LC(s) is shown in Equation 36:
A_LC
=
---------------^⎝⎛---¹----–------^ω--------^E-----^s---S--------^R------^⎠⎞---------------
⎛
⎜
⎝
---^s----²----
ω_DP
+
------------^s------------
(ω_LC ⋅ Q)
+
⎞
1⎟
⎠
(EQ. 36)
ω_ESR
=
---------------¹-----------------
(R_ESR ⋅ C_o)
ω_LC
=
-----------¹------------
( L ⋅ C_o)
Q = R_o ⋅
---^L---
C_o
20
FN6498.3
August 25, 2010