X9418_06 Datasheet, PDF (2/20 Pages) Intersil Corporation – Dual Digitally Controlled Potentiometers

X9418
Ordering Information
PART NUMBER
X9418WV24*
X9418WV24Z* (Note)
PART MARKING
V_CC LIMITS
(V)
POTENTIOMET
ER
TEMPERATU
ORGANIZATION RE RANGE
(kΩ)
(°C)
PACKAGE
PKG. DWG. #
X9418WV
5 ±10%
10
0 to +70 24 Ld TSSOP (4.4MM)
MDP0044
X9418WV Z
0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044
X9418WP24I-2.7
X9418WP G
2.7 to 5.5
10
-40 to +85 24 Ld PDIP
E24.6
X9418WS24I-2.7
X9418WS G
-40 to +85 24 Ld SOIC (300MIL)
M24.3
X9418WS24IZ-2.7 (Note) X9418WS ZG
-40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3
X9418WV24-2.7*
X9418WV F
X9418WV24Z-2.7* (Note) X9418WV ZF
X9418WV24I-2.7
X9418WV G
0 to +70
0 to +70
-40 to +85
24 Ld TSSOP (4.4MM)
MDP0044
24 Ld TSSOP (4.4MM) (Pb-free) MDP0044
24 Ld TSSOP (4.4MM)
MDP0044
X9418WV24IZ-2.7 (Note) X9418WV ZG
X9418YS24-2.7
X9418YS F
X9418YS24Z-2.7 (Note) X9418YS ZF
-40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044
2.5
0 to +70 24 Ld SOIC (300MIL)
M24.3
0 to +70 24 Ld SOIC (300MIL) (Pb-free) M24.3
X9418YS24I-2.7
X9418YS G
X9418YS24IZ-2.7 (Note) X9418YS ZG
X9418YV24I-2.7*
X9418YV G
-40 to +85
-40 to +85
-40 to +85
24 Ld SOIC (300MIL)
M24.3
24 Ld SOIC (300MIL) (Pb-free) M24.3
24 Ld TSSOP (4.4MM)
MDP0044
X9418YV24IZ-2.7* (Note) X9418YV ZG
-40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN DESCRIPTIONS
Potentiometer Pins
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9418.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
Device Address (A₀ - A₃)
The Address inputs are used to set the least
significant 4 bits of the 8-bit slave address. A match in
the slave address serial data stream must be made
with the Address input in order to initiate
communication with the X9418. A maximum of 16
devices may occupy the 2-wire serial bus.
V_H/R_H (V_H0/R_H0 - V_H1/R_H1), V_L/R_L (V_L0/R_L0 - V_L1/R_L1)
The V_H/R_H and V_L/R_L inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
V_W/R_W (V_W0/R_W0 - V_W1/R_W1)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages
for the XDCP analog section.
2
FN8194.3
October 12, 2006