ISL78210 Datasheet, PDF (2/17 Pages) Intersil Corporation – Automotive PWM DC/DC Voltage Controller

ISL78210
Pin Descriptions
PIN
1
2
SYMBOL
GND
EN
3, 5
4
NC
SREF
6
PGOOD
7
FB
8
VO
9
OCSET
10
PHASE
11
UGATE
12
BOOT
13
VCC
14
PVCC
15
LGATE
16
PGND
DESCRIPTION
IC ground for bias supply and signal reference.
Enable input for the IC. Pulling EN above the VENTHR rising threshold voltage initializes
the soft-start sequence.
No internal connection. Pins 3 and 5 should be connected to the GND pin.
Soft-start programming capacitor input. Connects internally to the inverting input of the
VSET voltage setpoint amplifier.
Power-good open-drain indicator output. This pin changes to high impedance when the
converter is able to supply regulated voltage. The pull-down resistance between the
PGOOD pin and the GND pin identifies which protective fault has shut down the regulator.
See Table 1 on page 10.
Voltage feedback sense input. Connects internally to the inverting input of the
control-loop error amplifier. The converter is in regulation when the voltage at the FB pin
equals the voltage on the SREF pin. The control loop compensation network connects
between the FB pin and the converter output. See Figure 8 on page 11.
Output voltage sense input for the R3 modulator. The VO pin also serves as the reference
input for the overcurrent detection circuit. See Figure 5 on page 7.
Input for the overcurrent detection circuit. The overcurrent setpoint programming
resistor ROCSET connects from this pin to the sense node. See “OVERCURRENT
PROGRAMMING CIRCUIT” on page 7.
Return current path for the UGATE high-side MOSFET driver. VIN sense input for the R3
modulator. Inductor current polarity detector input. Connect to junction of output
inductor, high-side MOSFET, and low-side MOSFET. See “Application Schematics” on
page 4 (Figures 2 and 3).
High-side MOSFET gate driver output. Connect to the gate terminal of the high-side
MOSFET of the converter.
Positive input supply for the UGATE high-side MOSFET gate driver. The BOOT pin is
internally connected to the cathode of the Schottky boot-strap diode. Connect an MLCC
between the BOOT pin and the PHASE pin.
Input for the IC bias voltage. Connect +5V to the VCC pin and decouple with at least a
1µF MLCC to the GND pin. See “Application Schematics” on page 4 (Figures 2 and 3).
Input for the LGATE and UGATE MOSFET driver circuits. The PVCC pin is internally
connected to the anode of the Schottky boot-strap diode. Connect +5V to the PVCC pin
and decouple with a 10µF MLCC to the PGND pin. See “Application Schematics” on page 4
(Figures 2 and 3).
Low-side MOSFET gate driver output. Connect to the gate terminal of the low-side
MOSFET of the converter.
Return current path for the LGATE MOSFET driver. Connect to the source of the low-side
MOSFET.
Ordering Information
PART NUMBER
(Notes 2, 3)
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
Tape & Reel
(Pb-Free)
PKG.
DWG. #
1. ISL78210ARUZ-T (Note 1) GAT
-40 to +105
16 Ld 2.6x1.8 µTQFN
L16.2.6x1.8A
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL78210. For more information on MSL please
see techbrief TB363.
2
FN7583.0
March 8, 2010