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ISL78210 Datasheet, PDF (11/17 Pages) Intersil Corporation – Automotive PWM DC/DC Voltage Controller
ISL78210
Compensation Design
Figure 8 shows the recommended Type-II compensation
circuit. The FB pin is the inverting input of the error
amplifier. The COMP signal, the output of the error
amplifier, is inside the chip and unavailable to users. CINT
is a 100pF capacitor integrated inside the IC, connecting
across the FB pin and the COMP signal. RFB, RCOMP,
CCOMP and CINT form the Type-II compensator. The
frequency domain transfer function is given by
Equation 12:
GCOMP(s)
=
------------1-----+-----s-----⋅---(--R-----F---B-----+-----R-----C----O----M-----P----)----⋅---C----C----O-----M-----P--------------
s
⋅
RF
B
⋅
CI
N
T
⋅
(
1
+
s
⋅
RCOM
P
⋅
C
C
O
)
MP
(EQ. 12)
CINT = 100pF
RCOMP CCOMP
COMP
-
FB
EA
+
SREF
RFB
ROFS
VOUT
FIGURE 8. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant
frequency that causes rapid phase change. The R3
modulator used in the IC makes the LC output filter
resemble a first order system in which the closed loop
stability can be achieved with the recommended Type-II
compensation network. Intersil provides a PC-based tool
that can be used to calculate compensation network
component values and help simulate the loop frequency
response.
General Application Design
Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a
single-phase power converter. It is assumed that the
reader is familiar with many of the basic skills and
techniques referenced in the following. In addition to
this guide, Intersil provides complete reference designs
that include schematics, bills of materials, and example
board layouts.
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of
the input and the output voltage. This relationship is
written as shown in Equation 13:
D
=
-V-----O---
VIN
(EQ. 13)
The output inductor peak-to-peak ripple current is
written as shown in Equation 14:
IP – P
=
-V----O-----⋅---(---1-----–----D-----)
FSW ⋅ L
(EQ. 14)
A typical step-down DC/DC converter will have an IP-P of
20% to 40% of the maximum DC output load current.
The value of IP-P is selected based upon several criteria,
such as MOSFET switching loss, inductor core loss, and
the resistive loss of the inductor winding. The DC copper
loss of the inductor can be estimated using Equation 15:
PCOPPER
=
IL
O
A
2
D
⋅
D
CR
(EQ. 15)
Where ILOAD is the converter output DC current.
The copper loss can be significant so attention has to be
given to the DCR selection. Another factor to consider
when choosing the inductor is its saturation
characteristics at elevated temperature. A saturated
inductor could cause destruction of circuit components,
as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance
CO into which ripple current IP-P can flow. Current IP-P
develops a corresponding ripple voltage VP-P across CO,
which is the sum of the voltage drop across the
capacitor ESR and of the voltage change stemming from
charge moved in and out of the capacitor. These two
voltages are written as Equations 16 and 17:
ΔVESR = IP – P ⋅ ESR
(EQ. 16)
and:
ΔVC = 8-----⋅---C--I--P-O----–--⋅--P-F---S----W----
(EQ. 17)
If the output of the converter has to support a load with
high pulsating current, several capacitors will need to be
paralleled to reduce the total ESR until the required VP-P
is achieved. The inductance of the capacitor can cause a
brief voltage dip if the load transient has an extremely
high slew rate. Low inductance capacitors should be
considered. A capacitor dissipates heat as a function of
RMS current and frequency. Be sure that IP-P is shared
by a sufficient quantity of paralleled capacitors so that
they operate below the maximum rated RMS current at
FSW. Take into account that the rated value of a capacitor
can fade as much as 50% as the DC voltage across it
increases.
Selection of the Input Capacitor
The important parameters for the bulk input capacitance
are the voltage rating and the RMS current rating. For
reliable operation, select bulk capacitors with voltage and
current ratings above the maximum input voltage and
capable of supplying the RMS current required by the
switching circuit. Their voltage rating should be at least
1.25x greater than the maximum input voltage, while a
voltage rating of 1.5x is a preferred rating. Figure 9 is a
graph of the input RMS ripple current, normalized
relative to output load current, as a function of duty
cycle that is adjusted for converter efficiency. The ripple
current calculation is written as expressed in
Equation 18:
(
IM
A
2
X
⋅
(
D
–
D2
)
)
+
⎛
⎝
x
⋅
IM
A
2
X
⋅1--D--2--
⎞
⎠
IIN_RMS
=
----------------------------------------------------------------------------------------------------
IMAX
(EQ. 18)
11
FN7583.0
March 8, 2010