ISL78210 Datasheet, PDF (12/17 Pages) Intersil Corporation – Automotive PWM DC/DC Voltage Controller

ISL78210
Where:
- I_MAX is the maximum continuous I_LOAD of the
converter
- x is a multiplier (0 to 1) corresponding to the
inductor peak-to-peak ripple amplitude expressed
as a percentage of I_MAX (0% to 100%)
- D is the duty cycle that is adjusted to take into
account the efficiency of the converter
Duty cycle is written as expressed in Equation 19:
D
=
----------^V----^O------------
V_IN ⋅ EFF
(EQ. 19)
In addition to the bulk capacitance, some low ESL
ceramic capacitance is recommended to decouple
between the drain of the high-side MOSFET and the
source of the low-side MOSFET.
0.60
0.55
0.50
0.45
0.40
0.35
0.30
x=1
0.25
x = 0.75
0.20
x = 0.50
0.15
0.10
x = 0.25
x=0
0.05
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
DUTY CYCLE
FIGURE 9. NORMALIZED RMS INPUT CURRENT FOR
x = 0.8
Selecting The Bootstrap Capacitor
Adding an external capacitor across the BOOT and
PHASE pins completes the bootstrap circuit. We selected
the bootstrap capacitor breakdown voltage to be at
least 10V. Although the theoretical maximum voltage of
the capacitor is PVCC - V_DIODE (voltage drop across the
boot diode), large excursions below ground by the
PHASE node requires that we select a capacitor with at
least a breakdown rating of 10V. The bootstrap
capacitor can be chosen from Equation 20:
C_B
O
OT
≥
---^Q----^G-----^A----^T---^E----
ΔV_BOOT
(EQ. 20)
Where:
- Q_GATE is the amount of gate charge required to
fully charge the gate of the upper MOSFET
- ΔV_BOOT is the maximum decay across the BOOT
capacitor
As an example, suppose an upper MOSFET has a gate
charge, Q_GATE, of 25nC at 5V and also assume the droop
in the drive voltage over a PWM cycle is 200mV. One will
find that a bootstrap capacitance of at least 0.125µF is
required. The next larger standard value capacitance is
0.15µF. A good quality ceramic capacitor such as X7R or
X5R is recommended.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Q_GATE = 100nC
0.4
0.2
20nC
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
ΔV_{BOOT_CAP} (V)
FIGURE 10. BOOTSTRAP CAPACITANCE vs BOOT
RIPPLE VOLTAGE
Driver Power Dissipation
Switching power dissipation in the driver is mainly a
function of the switching frequency and total gate charge
of the selected MOSFETs. Calculating the power
dissipation in the driver for a desired application is critical
to ensuring safe operation. Exceeding the maximum
allowable power dissipation level will push the IC beyond
the maximum recommended operating junction
temperature of +125°C. When designing the application,
it is recommended that the following calculation be
performed to ensure safe operation at the desired
frequency for the selected MOSFETs. The power
dissipated by the drivers is approximated using
Equation 21:
P = F_sw(1.5V_UQ_U + V_LQ_L) + P_L + P_U
(EQ. 21)
Where:
- F_sw is the switching frequency of the PWM signal
- V_U is the upper gate driver bias supply voltage
- V_L is the lower gate driver bias supply voltage
- Q_U is the charge to be delivered by the upper
driver into the gate of the MOSFET and discrete
capacitors
- Q_L is the charge to be delivered by the lower driver
into the gate of the MOSFET and discrete
capacitors
- P_L is the quiescent power consumption of the lower
driver
- P_U is the quiescent power consumption of the upper
driver
MOSFET Selection and Considerations
Typically, a MOSFET cannot tolerate even brief excursions
beyond their maximum drain to source voltage rating.
The MOSFETs used in the power stage of the converter
should have a maximum V_DS rating that exceeds the
sum of the upper voltage tolerance of the input power
source and the voltage spike that occurs when the
MOSFET switches off.
12
FN7583.0
March 8, 2010