ISL6532C Datasheet, PDF (2/16 Pages) Intersil Corporation – ACPI Regulator/Controller for Dual Channel DDR Memory Systems

Block Diagram
VDDQ(3)
P5VSBY
VDDQ S3
REGULATOR
+
-
VTTSNS
VTT(2)
VTT
- ^REG
+
GNDQ
DISABLE
{
R_U
VREF_IN
{
R_L
+-
GNDA
VREF_OUT
+
-
UV/OV2
S3#
S5#
VOLTAGE
REFERENCE
0.800V
0.680V (-15%)
0.920V (+15%)
5VSBY
5V
POR
S3
S0
S0/S3
SLEEP,
SOFT-START,
PGOOD,
AND FAULT
LOGIC
UV/OV
PWM ENABLE
-
+
UV/OV3
SOFT-START
+
-
EA1
+
-
COMP
PWM
OSCILLATOR
250kHz
12VCC
+ ^EA2
- _{650Ω OUTPUT}
IMPEDANCE
PWM
LOGIC
12V
POR
- ^UV/OV1
+
+
-
OC
COMP
20µA
PGOOD
FB COMP
OCSET
GNDP
DRIVE2
FB2
NCH
P12V
UGATE
PHASE
LGATE