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ISL78220 Datasheet, PDF (19/22 Pages) Intersil Corporation – 6-Phase Interleaved Boost PWM Controller with Light Load Efficiency Enhancement
ISL78220
Adjustable Slope Compensation
For a boost converter working in current mode control, slope
compensation is needed when steady state duty cycle is larger
than 50%. When slope compensation is too low the converter
can suffer from jitter or oscillation. On the other hand, over
compensation of the slope will cause the reduction of the phase
margin. Therefore, proper design of the slope compensation is
needed.
The ISL78220 features adjustable slope compensation by
setting the resistor value RSLOPE from the SLOPE pin to GND.
This function will ease the compensation design and provide
more flexibility in choosing the external components.
For current mode control, typically we need the compensation
slope mA to be 50% of the inductor current down ramp slope mB
when the lower MOSFET is off. The equation for choosing the
suitable resistor value is as follows:
RSLOPE
=
1----.-1----3----6---x----1---0----6---x---L----x---R----S---E---T-
(VOUT – VIN)(RSEN)
(
Ω
)
(EQ. 9)
Fault Monitoring and Protection
The ISL78220 actively monitors input/output voltage and current to
detect fault conditions. Fault monitors trigger protective measures
to prevent damage to the load. Common power-good indicator pin
(PGOOD pin) and VIN_OVB, VOUT_OVB pins are provided for linking
to external system monitors.
PGOOD Signal
The PGOOD pin is an open-drain logic output to indicate that the
soft-start period is completed and the output voltage is within the
specified range. This pin is pulled low during soft-start and
releases high after a successful soft-start. PGOOD will be pulled
low when a UV/OV/OC/OT fault occurs.
Input Overvoltage Detection
The ISL78220 utilizes VIN_SEN and VIN_OVB pins to deal with a
high input voltage. The VIN_SEN pin is used for sensing the input
voltage. A resistor divider network is connected between this pin
and the boost power stage input voltage rail. When the voltage
on VIN_SEN is higher than 2.4V, the open drain output VIN_OVB
pin will be pulled low to indicate an input overvoltage condition,
The VIN overvoltage sensing threshold can be programmed by
changing the resistor values, and hysteresis voltage of the
internal comparator is fixed to be 100mV.
Output Undervoltage Detection
The undervoltage threshold is set at 80% of the internal voltage
reference. When the output voltage at FB pin is below the
undervoltage threshold minus the hysteresis, PGOOD is pulled
low. When the output voltage comes back to 80% of the
reference voltage, PGOOD will return back to high.
Output Overvoltage Detection/Protection
The ISL78220 overvoltage detection circuit monitors the FB pin
and is active after time t2 in Figure 14. The OV trip point is set to
120% of the internal reference level. Once an overvoltage
condition is detected, the PGOOD will be pulled low but the
controller will continue to operate.
The ISL78220 also provides the flexibility for output overvoltage
protection by utilizing the VOUT_SEN and VOUT_OVB pins. The
VOUT_SEN pin is used for sensing the output voltage. A resistor
divider network is connected between this pin and the boost
power stage output voltage rail. When the voltage on VOUT_SEN
is higher than 2.4V, the open drain output VOUT_OVB will be
pulled low, and the ISL78220 IC will be latched off to indicate an
output overvoltage condition. The VOUT overvoltage sensing
threshold can be programmed by changing the resistor values.
Overcurrent Protection
ISL78220 has two levels of overcurrent protection. Each phase is
protected from an overcurrent condition by limiting its peak
current, and the combined total current is protected on an
average basis.
For the individual channel overcurrent protection, the ISL78220
continuously compares the CSA output current of each channel
with a 160µA reference current. If any channel’s current trips the
current limit comparator, the ISL78220 will be shut down.
However, during the phase adding period, the individual channel
current protection function will be blanked for 200µs, in order to
give other phases the chance to take care of the current.
IOUT pin serves for both input current monitoring and total
average current OCP functions. The CSA output current for each
channel is scaled and summed together at this pin. An RC
network should be connected between IOUT pin and GND, such
that the ripple current signal can be filtered out and converted to
a voltage signal to represent the averaged total input current. The
relationship between total input current IIN and VIOUT can be
calculated as Equation 10: (Please refer to Figure 20 for RSEN
and RSET positions).
VIOUT
=
0.75
II
N
R-----S---E---N--
RSET
RI
OU
T
(EQ. 10)
When the VIOUT is higher than 2V for a consecutive 100µs, the
ISL78220 IC will be triggered to shut down. This provides
additional safety for the voltage regulator.
Equation 11 can be used to calculate the value of the resistor RIOUT
based on the desired OCP level IAVG, OCP2.
RIOUT
=
-------------2--------------
IAVG, OCP2
(EQ. 11)
The total average overcurrent protection scheme will not be
asserted until the soft-start pin voltage VSS reaches its clamped
value (approximately 3.5V). During the soft-start time the system
does not latch-off if per-channel or overall OC limit is reached.
Instead the individual channel current will run at its pre-set peak
current limit level.
Thermal Protection
The ISL78220 will be disabled if the die junction temperature
reaches a nominal of +160°C. It will recover when the junction
temperature falls below a +15°C hysteresis. The +15°C
hysteresis insures that the device will not be re-enabled until the
junction temperature has dropped to below about +145°C.
19
FN7688.0
December 15, 2011