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82C50A_06 Datasheet, PDF (19/25 Pages) Intersil Corporation – CMOS Asynchronous
82C50A
AC Electrical Specifications VCC = 5.0V ±10%, TA = 0oC to +70oC (CX82C50A-5) TA = -40oC to +85oC (lX82C50A-5)
Timing (Continued)
SYMBOL
PARAMETER
BAUD GENERATOR
(29)
N Baud Divisor
(30) TBLD Baud Output Negative Edge Delay
(31) TBHD Baud Output Positive Edge Delay
(32) TLW Baud Output Down Time
(33) THW Baud Output Up Time
RECEIVER
(34) TSCD Delay from RCLK to Sample Time
(35) TSlNT Delay from Stop to Set Interrupt
(36) TRlNT Delay from DISTR DISTR (RD RBR) to
Reset Interrupt
TRANSMITTER
(37) THR Delay from DOSTR DOSTR to Reset Interrupt
(38) TlRS Delay from Initial INTR Reset to Transmit Start
(39) TS1 Delay from Initial Write to Interrupt
(40) TSTl Delay from Stop to Interrupt (THRE)
(41) TIR Delay from DISTR DISTR (RD lIR) to Reset Interrupt
(THRE)
MODEM CONTROL
(42) TMDO Delay from DOSTR DOSTR to Output
(43) TSIM Delay to Set Interrupt from Modem Input
(44) TRIM Delay to Reset Interrupt from DISTR DlSTR
(RD MSR)
82C50A-5
MIN
MAX
UNITS
TEST CONDITIONS
1
216-1
-
250
ns
-
250
ns
40
-
ns
40
-
ns
TXL = 50ns
TXH = 50ns
-
250
ns
1
1
BAUDOUT
Cycles
-
250
ns
-
250
ns
8
24
BAUDOUT
Cycles
16
32
BAUDOUT
Cycles
8
24
BAUDOUT
Cycles
-
250
ns
-
500
ns
-
500
ns
-
500
ns
19
FN2958.5
August 24, 2006