ISL62773 Datasheet, PDF (18/37 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion™ Desktop CPUs Using SVI 2.0

ISL62773
Using the same components for L1, L2 and L3 provides a good
match of R_dcr1, R_dcr2 and R_dcr3. Board layout determines R_pcb1,
R_pcb2 and R_pcb3. It is recommended to have a symmetrical
layout for the power delivery path between each inductor and the
output voltage rail, such that R_pcb1 = R_pcb2 = R_pcb3.
ISEN3
Cisen
PHASE3 ^V3p
Risen
Risen
INTERNAL
TO IC
ISEN2
Cisen
Risen
PHASE2 ^V2p
Risen
Risen
Risen
ISEN1
Cisen
PHASE1 ^V1p
Risen
Risen
Risen
L3
Rdcr3
Rpcb3
IL3
V3n
L2
Rdcr2
Rpcb2
Vo
IL2
V2n
L1
Rdcr1
Rpcb1
IL1
V1n
FIGURE 16. DIFFERENTIAL-SENSING CURRENT BALANCING
CIRCUIT
At times, it is difficult to implement symmetrical layout. For the
circuit shown in Figure 15, asymmetric layout causes different
R_pcb1, R_pcb2 and R_pcb3 values, thus creating a current
imbalance. Figure 16 shows a differential sensing current
balancing circuit recommended for ISL62773. The current
sensing traces should be routed to the inductor pads so they only
pick up the inductor DCR voltage. Each ISEN pin sees the average
voltage of three sources: its own, phase inductor phase-node
pad, and the other two phases inductor output side pads.
Equations 8 through 10 give the ISEN pin voltages:
V_ISEN1 = V_1p + V_2n + V_3n
(EQ. 8)
V_ISEN2 = V_1n + V_2p + V_3n
(EQ. 9)
V_ISEN3 = V_1n + V_2n + V_3p
(EQ. 10)
The ISL62773 will make V_ISEN1 = V_ISEN2 = V_ISEN3 as shown in
Equations 11 and 12:
V_1p + V_2n + V_3n = V_1n + V_2p + V_3n
(EQ. 11)
V_1n + V_2p + V_3n = V_1n + V_2n + V_3p
(EQ. 12)
Rewriting Equation 11 gives Equation 13:
V_1p – V_1n = V_2p – V_2n
(EQ. 13)
Rewriting Equation 12 gives Equation 14:
V_2p – V_2n = V_3p – V_3n
Combining Equations 13 and 14 gives:
V_1p – V_1n = V_2p – V_2n = V_3p – V_3n
(EQ. 14)
(EQ. 15)
Therefore:
R_dcr1  I_L1 = R_dcr2  I_L2 = R_dcr3  I_L3
(EQ. 16)
Current balancing (I_L1 = I_L2 = I_L3) is achieved when
R_dcr1 = R_dcr2 = R_dcr3. R_pcb1, R_pcb2 and R_pcb3 do not have any
effect.
Since the slave ripple capacitor voltages mimic the inductor
currents, the R³â„¢ modulator can naturally achieve excellent
current balancing during steady state and dynamic operations.
Figure 17 shows the current balancing performance of the
evaluation board with load transient of 12A/51A at different
repetition rates. The inductor currents follow the load current
dynamic change with the output capacitors supplying the
difference. The inductor currents can track the load current well
at a low repetition rate, but cannot keep up when the repetition
rate gets into the hundred-kHz range, where it is out of the
control loop bandwidth. The controller achieves excellent current
balancing in all cases installed.
18
March 7, 2012
FN8263.0