ISL5239 Datasheet, PDF (18/31 Pages) Intersil Corporation – Pre-Distortion Linearizer

Waveforms (Continued)
ISL5239
CLK
IN<17:0>,
QIN<17:0>,
ISTRB
CLKOUT
IOUT<19:0>,
QOUT<19:0>
t_DS
VALID
t_CCO1, t_CCON
t_DH
VALID
t_PDC1
VALID
VALID
VALID
FIGURE 17. INPUT/OUTPUT TIMING
CLK
TRIGIN
TRIGOUT
t_PDC
t_DS1
t_DH1
FIGURE 18. TRIGGER PORT TIMING
CLK
FBCLK
FB<19:0>
t_CFBD
t_FS
t_FH
FIGURE 19. FEEDBACK TIMING
CLK
RD
t_WSC
WR
BUSY
CS
A<5:0>
P<15:0>
t_WPWL
t_WHC
t_WPWH
t_BDW
4 CLK CYCLES
t_CSW
t_CHW
VALID
VALID
t_ASW
t_AHW
t_PSW
t_PHW
FIGURE 21. MICROPROCESSOR WRITE TIMING
18
TCK
TMS, TDI
TDO
t_TS
t_TH
t_TD
VALID
FIGURE 20. JTAG TIMING
CLK
t_RSR
RD
t_RHR
WR
BUSY
t_CSR
CS
t_ASC
A<5:0>
P<15:0>
VALID
t_ASR
t_RE
t_CHR
t_DR1
t_RD
VALID
FIGURE 22. MICROPROCESSOR READ TIMING