ISL70417SEH Datasheet, PDF (17/22 Pages) Intersil Corporation – Rad Hard 40V Quad Precision Low Power Operational Amplifiers

ISL70417SEH
Applications Information
Functional Description
The ISL70417SEH contains four, low noise precision op amps.
These devices are fabricated in a new precision 40V
complementary bipolar DI process. A super-beta NPN input stage
with input bias current cancellation provides low input bias
current (180pA typical), low input offset voltage (13µV typical),
low input noise voltage (8nV/√Hz), and low 1/f noise corner
frequency (~8Hz). These amplifiers also feature high open loop
gain (14kV/mV) for excellent CMRR (145dB) and THD+N
performance (0.0005% @ 3.5V_RMS, 1kHz into 2kΩ). A
complementary bipolar output stage enables high capacitive
load drive without external compensation.
Operating Voltage Range
The devices are designed to operate over the 4.5V (±2.25V) to
40V (±20V) voltage range and are fully characterized at 10V
(±5V) and 30V (±15V). The Power Supply Rejection Ratio typically
exceeds 140dB over the full operating voltage range and 120dB
minimum over the -55°C to +125°C temperature range. The
worst case common mode input voltage range over temperature
is 2V to each rail. With ±15V supplies, CMRR performance is
typically >130dB over-temperature. The minimum CMRR
performance over the -55°C to +125°C temperature range is
>120dB for power supply voltages from ±5V (10V) to ±15V (30V).
Input Performance
The super-beta NPN input pair provides excellent frequency
response while maintaining high input precision. High NPN beta
(>1000) reduces input bias current while maintaining good
frequency response, low input bias current and low noise. Input
bias cancellation circuits provide additional bias current
reduction to <5nA, and excellent temperature stabilization.
Figures 6 through 8 show the high degree of bias current stability
at ±5V and ±15V supplies that is maintained across the -55°C to
+125°C temperature range. The low bias current TC also
produces very low input offset current TC, which reduces DC
input offset errors in precision, high impedance amplifiers.
The +25°C maximum input offset voltage (V_OS) is 75µV at ±15V
supplies. Input offset voltage temperature coefficients (V_OSTC) is a
maximum of ±1.0µV/°C. The V_OS temperature behavior is smooth
(Figures 3 through 4) maintaining constant TC across the entire
temperature range.
Input ESD Diode Protection
The input terminals (IN+ and IN-) have internal ESD protection
diodes to the positive and negative supply rails, series connected
500Ω current limiting resistors and an anti-parallel diode pair
across the inputs (Figure 53).
V+
- ^500Ω
V_IN
+ ^500Ω
V_OUT
R_L
V-
FIGURE 53. INPUT ESD DIODE CURRENT LIMITING- UNITY GAIN
The series resistors limit the high feed-through currents that can
occur in pulse applications when the input dV/dT exceeds the
0.5V/µs slew rate of the amplifier. Without the series resistors, the
input can forward-bias the anti-parallel diodes causing current to
flow to the output resulting in severe distortion and possible diode
failure.
Figure 36 provides an example of distortion free large signal
response using a 4V_P-P input pulse with an input rise time of <1ns.
The series resistors enable the input differential voltage to be
equal to the maximum power supply voltage (40V) without
damage.
In applications where one or both amplifier input terminals are at
risk of exposure to high voltages beyond the power supply rails,
current limiting resistors may be needed at the input terminal to
limit the current through the power supply ESD diodes to 20mA
max.
Output Current Limiting
The output current is internally limited to approximately ±45mA
at +25°C and can withstand a short circuit to either rail as long
as the power dissipation limits are not exceeded. This applies to
only 1 amplifier at a time for the quad op amp. Continuous
operation under these conditions may degrade long term
reliability. Figures 15 and 16 show the current limit variation with
temperature.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL70417SEH is immune to output phase reversal,
even when the input voltage is 1V beyond the supplies.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (T_JMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
T_JMAX = T_MAX + θ_JAxPD_MAXTOTAL
(EQ. 1)
where:
• P_DMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PD_MAX)
17
July 2, 2012
FN7962.0