HC55171_03 Datasheet, PDF (17/20 Pages) Intersil Corporation – 5 REN Ringing SLIC for ISDN Modem/TA and WLL

HC55171
The following equations are used to predict the DC output of
the ring feed amplifier when using the zener clamping
network, V_RDC.
V_{-----B----A----T-}
2
< V_Z
V_RDC
=
2


-^V----^B-₂---^A----^T-_
+4
(EQ. 33)
V_{-----B----A----T-}
2
≥ V_Z
V_RDC = 2(–V_Z + (V_CE – V_BE)) + 4 ^{(EQ. 34)}
Where V_Z is the zener diode voltage and V_CE and V_BE are
the saturation voltages of the PNP transistor. Using
Equations 31 and 32, the tip-to-ring open-circuit voltage can
be calculated for any value of zener diode and battery
voltage.
V_{-----B----A----T-}
2
< V_Z
V_OC
=
V_TDC
–
2


-^V----^B-₂---^A----^T-_
–4
(EQ. 35)
V_{-----B----A----T-}
2
≥ V_Z
V_OC = V_TDC – 2(–V_Z + (V_CE – V_BE)) – 4
(EQ. 36)
When the base of the PNP transistor is pulled high (+5V),
the transistor is off and the zener clamp is disabled. When
the base of the transistor is pulled low (0V) the transistor is
on and the zener will clamp as long as half the battery
voltage is greater than the zener voltage.
Polarity Reversal
The HC55171 supports applications that use polarity reversal
outside the speech phase of a call connection. The most
common implementation of this type of polarity reversal is
used with pay phones. By reversing the polarity of the tip and
ring terminals of a pay phone, DC current changes direction in
a solenoid and the coins are released from the phone. To
reverse the polarity of the HC55171, simply toggle the V_RING
input high. Setting the V_RING input high will cause Tip and
Ring to reverse polarity.
Transhybrid Balance
Since the receive signal and its echo are 180 degrees out of
phase, the summing node of an operational amplifier can be
used to cancel the echo. Nearly all CODECs have an
internal amplifier for echo cancellation. The following Figure
19 shows the cancellation amplifier circuit.
R_A
R_F
V_RX
R_B
V_OUT1
-
+
VO
FIGURE 19. TRANSHYBRID AMPLIFIER CIRCUIT
When the SLIC is matched to a 600Ω load, the echo
amplitude is 1/3 the receive input amplitude. Therefore, by
configuring the transhybrid amplifier with a gain of 3 in the
echo path, cancellation can be achieved. The following
equations:
V_O
=
–

V_RX



R^-R----_AF^--_{}
+
V_O
U
T
1



R^-R----_BF^--_{}
(EQ. 37)
Substituting the fact that V_OUT1 is -1/3 of V_RX
V_O
=
–

V_RX



R^-R----_AF^--_{}
–
V_R
X


13_{--}



R^-R----_BF^--_{}



(EQ. 38)
Since cancellation implies that under these conditions, the
output V_O should be zero, set Equation 37 equal to zero and
solve for R_B.
R_B
=
-^R----^A--
3
(EQ. 39)
Another outcome of the transhybrid gain selection is the 2-
wire to 4-wire gain of the SLIC as seen by the CODEC. The
1/3 voltage gain in the transmit path is relevant to the receive
input as well as any signals from the 2-wire side. Therefore
by setting the V_OUT1 gain to three in the previous analysis,
the 2-wire to 4-wire gain was set to unity.
Single Supply CODEC Interface
The majority of CODECs that interface to the ringing SLIC
operate from a single +5V supply and ground. Figure 20
shows the circuitry required to properly interface the ringing
SLIC to the single supply CODEC.
The CODEC signal names may vary from different
manufacturers, but the function provided will be the same.
The DC reference from the CODEC is used to bias the
analog signals between +5V and ground. The capacitors are
required so that the DC gain is unity for proper biasing from
the CODEC reference. Also, the capacitors block DC signals
that may interfere with SLIC or CODEC operation.
Layout Guidelines and Considerations
The printed circuit board trace length to all high impedance
nodes should be kept as short as possible. Minimizing length
will reduce the risk of noise or other unwanted signal pickup.
The short lead length also applies to all high gain inputs. The
set of circuit nodes that can be categorized as such are:
• V_RX pin 27, the 4-wire voice input.
• -IN1 pin 13, the inverting input of the internal amplifier.
• V_REF pin 3, the noninverting input to ring feed
amplifier.
• V_RING pin 24, the 20V/V input for the ringing signal.
For multi layer boards, the traces connected to tip should not
cross the traces connected to ring. Since they will be
carrying high voltages, and could be subject to lightning or
surge depending on the application, using a larger than
minimum trace width is advised.
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