X9241A_06 Datasheet, PDF (16/16 Pages) Intersil Corporation – Quad Digital Controlled Potentionmeters (XDCP™)

X9241A
Dual-In-Line Plastic Packages (PDIP)
INDEX
AREA
N
12 3
E1
N/2
-B-
-A-
D
E
BASE
PLANE
SEATING
PLANE
-C- ^{A2 A}
L
CL
D1
D1
A1
e_A
B1
e
B
e_C
C
0.010 (0.25) M C A B S
e_B
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and e_A are measured with the leads constrained to be perpen-
dicular to datum -C- .
7. e_B and e_C are measured at the lead tips with the leads uncon-
strained. e_C must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dam-
bar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E20.3 (JEDEC MS-001-AD ISSUE D)
20 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN
MAX
MIN
MAX NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115 0.195 2.93 4.95
-
B
0.014 0.022 0.356 0.558
-
B1
0.045 0.070 1.55 1.77
8
C
0.008 0.014 0.204 0.355
-
D
0.980 1.060 24.89 26.9
5
D1
0.005
-
0.13
-
5
E
0.300 0.325 7.62 8.25
6
E1
0.240 0.280 6.10 7.11
5
e
0.100 BSC
2.54 BSC
-
e_A
0.300 BSC
7.62 BSC
6
e_B
-
0.430
-
10.92
7
L
0.115 0.150 2.93 3.81
4
N
20
20
9
Rev. 0 12/93
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
FN8164.5
December 14, 2006