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ISL6559 Datasheet, PDF (16/21 Pages) Intersil Corporation – Multi-Phase PWM Controller
ISL6559
each of the three cases which follow, there is a separate set
of equations for the compensation components.
Case 1:
---------1----------
2π LC
>
f0
RC
=
RFB
2----π----f--0---V-----p---p--------L---C---
0.75 VI N
CC
=
--------0---.--7---5----V----I--N----------
2πVPPRFBf0
Case 2:
---------1----------
2π LC
≤
f0
<
2----π----C-----(-1-E-----S----R-----)
RC
=
RFB
V-----P----P----(--2----π----)--2----f--0--2----L----C---
0.75 VIN
CC
=
--------------------0----.-7----5---V-----I--N---------------------
(2π)2 f02 VPPRFB LC
(EQ. 23)
Case 3:
f0 > 2----π----C-----(-1-E-----S----R-----)
RC
=
RFB
--------2----π----f--0---V-----p---p---L---------
0.75 VIN (ESR)
CC
=
-0---.--7---5----V----I--N----(--E-----S----R-----)-------C---
2πVPPRFBf0 L
In Equations 23, L is the per-channel filter inductance
divided by the number of active channels; C is the sum total
of all output capacitors; ESR is the equivalent-series
resistance of the bulk output-filter capacitance; and VPP is
the peak-to-peak sawtooth signal amplitude as described in
Figure 4 and Electrical Specifications.
Once selected, the compensation values in Equations 23
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to RC. Slowly increase the
value of RC while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
CC will not need adjustment. Keep the value of CC from
Equations 23 unless some performance issue is noted.
The optional capacitor C2, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 12). Keep
a position available for C2, and be prepared to install a high-
frequency capacitor of between 22pF and 150pF in case any
trailing edge jitter problem is noted.
C2
RC CC
COMP
C1
R1
RFB
FB
IOUT
VDIFF
FIGURE 13. COMPENSATION CIRCUIT FOR ISL6559 BASED
CONVERTER WITHOUT LOAD-LINE
REGULATION.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 13, provides the
necessary compensation.
The first step is to choose the desired bandwidth, f0, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than 1/3
of the switching frequency. The type-III compensator has an
extra high-frequency pole, fHF. This pole can be used for added
noise rejection or to assure adequate attenuation at the error-
amplifier high-order pole and zero frequencies. A good general
rule is to chose fHF = 10f0, but it can be higher if desired.
Choosing fHF to be lower than 10f0 can cause problems with
too much phase shift below the system bandwidth.
In the solutions to the compensation equations, there is a single
degree of freedom. For the solutions presented in Equations
24, RFB is selected arbitrarily. The remaining compensation
components are then selected according to Equations 24.
R1
=
RF
B
----------C-----(--E----S-----R-----)---------
LC – C(ESR)
C1
=
-----L----C-----–-----C-----(--E-----S----R-----)
RFB
C2
=
-----------------------0----.-7----5---V-----I-N-------------------------
(2π)2f0fHF LCRFBVPP
RC
=
---V-----P----P------2----π------2----f--0---f--H----F----L----C----R-----F----B----
0.75 VIN 2πfHF LC–1
CC
=
--0----.-7----5----V----I--N-----2----π----f--H----F--------L----C-----–---1------
(2π)2f0fHF LCRFBVPP
(EQ. 24)
16
FN9084.8
December 29, 2004