ISL6559 Datasheet, PDF (14/21 Pages) Intersil Corporation – Multi-Phase PWM Controller

ISL6559
Power Stages
The first step in designing a multi-phase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted; and
the total board space available for power-supply circuitry.
Generally speaking, the most economical solutions are
those where each phase handles between 15 and 20A. All
surface-mount designs will tend toward the lower end of this
current range and, if through-hole MOSFETs can be used,
higher per-phase currents are possible. In cases where
board space is the limiting constraint, current can be pushed
as high as 30A per phase, but these designs require heat
sinks and forced air to cool the MOSFETs.
MOSFETS
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching frequency;
the capability of the MOSFETs to dissipate heat; and the
availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (r_DS(ON)). In Equation 13, I_M is the maximum
continuous output current; I_PP is the peak-to-peak inductor
current (see Equation 1); d is the duty cycle (V_OUT/V_IN); and
L is the per-channel inductance.
P_L
=
r_DS(ON)



-I-^M---
N
2
(
1
–
d
)
+
-I-^L---^,---^2P----^P----⁽--1-----^–-----d----⁾
12
(EQ. 13)
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I_M, V_D(ON); the switching frequency,
f_S; and the length of dead times, t_d1 and t_d2, at the
beginning and the end of the lower-MOSFET conduction
interval respectively.
P_D
=
V_D(ON) f_S


-I-^M---
N
+
I--_{P-2---P--}
t_d1
+


-I-^M---
N
–
-I-^P--2--^P--_{}
t_d2
(EQ. 14)
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P_L and P_D.
UPPER MOSFET POWER CALCULATION
In addition to r_DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V_IN) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q_rr; and the upper MOSFET r_DS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 15,
the required time for this commutation is t₁ and the
approximated associated power loss is P_UP,1.
P _{U P,1}
≈
V_IN


-I-^M---
N
+
I--_{P-2---P--}



t--_1--


2_
f_S
(EQ. 15)
The upper MOSFET begins to conduct and this transition
occurs over a time t₂. In Equation 16, the approximate power
loss is P_UP,2.
P_{UP, 2}
≈
V_IN


-I-^M---
^N
–
I--_{P----P--}
2



t--_2--


2_
f_S
(EQ. 16)
A third component involves the lower MOSFET’s reverse-
recovery charge, Q_rr. Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q_rr, it is conducted
through the upper MOSFET across VIN. The power
dissipated as a result is P_UP,3 and is approximately
P_UP,3 = V_IN Q_rr f_S
(EQ. 17)
Finally, the resistive part of the upper MOSFET’s is given in
Equation 18 as P_UP,4.
P_UP,4 ≈ r_DS(ON)


-I-^M---
 N
2
d
+
-I-^P----^P--²-
12
(EQ. 18)
In this case, of course, r_DS(ON) is the on resistance of the
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 15, 16, 17 and 18. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
The ISEN pins are denoted ISEN1, ISEN2, ISEN3 and
ISEN4. The resistors connected between these pins and
their respective phase nodes determine the gains in the
load-line regulation loop and the channel-current balance
14
FN9084.8
December 29, 2004